C8051F066-GQ Silicon Laboratories Inc, C8051F066-GQ Datasheet - Page 4
![MCU 8-Bit C8051F06x 8051 CISC 32KB Flash 3.3V 100-Pin TQFP](/photos/12/39/123961/c8051f066-gq_sml.jpg)
C8051F066-GQ
Manufacturer Part Number
C8051F066-GQ
Description
MCU 8-Bit C8051F06x 8051 CISC 32KB Flash 3.3V 100-Pin TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Specifications of C8051F066-GQ
Package
100TQFP
Device Core
8051
Family Name
C8051F06x
Maximum Speed
25 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
59
Interface Type
I2C/SMBus/SPI/UART
On-chip Adc
2-chx16-bit
Number Of Timers
5
Ram Size
4.25 KB
Program Memory Size
32 KB
Program Memory Type
Flash
Operating Temperature
-40 to 85 °C
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
59
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1221
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F066-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F066-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F060/1/2/3/4/5/6/7
8. DACs, 12-Bit Voltage Mode (DAC0 and DAC1, C8051F060/1/2/3) .................... 103
9. Voltage Reference 2 (C8051F060/2) .................................................................... 111
10. Voltage Reference 2 (C8051F061/3) ................................................................... 113
11. Voltage Reference 2 (C8051F064/5/6/7) .............................................................. 115
12. Comparators ......................................................................................................... 117
13. CIP-51 Microcontroller ......................................................................................... 123
14. Reset Sources....................................................................................................... 163
4
7.3. Programmable Window Detector ...................................................................... 97
8.1. DAC Output Scheduling.................................................................................. 104
8.2. DAC Output Scaling/Justification .................................................................... 104
12.1.Comparator Inputs.......................................................................................... 119
13.1.Instruction Set................................................................................................. 125
13.2.Memory Organization ..................................................................................... 130
13.3.Interrupt Handler............................................................................................. 151
13.4.Power Management Modes............................................................................ 160
14.1.Power-on Reset.............................................................................................. 164
14.2.Power-fail Reset ............................................................................................. 164
14.3.External Reset ................................................................................................ 164
14.4.Missing Clock Detector Reset ........................................................................ 165
14.5.Comparator0 Reset ........................................................................................ 165
14.6.External CNVSTR2 Pin Reset ........................................................................ 165
14.7.Watchdog Timer Reset................................................................................... 165
7.3.1. Window Detector In Single-Ended Mode ................................................. 99
7.3.2. Window Detector In Differential Mode.................................................... 100
8.1.1. Update Output On-Demand ................................................................... 104
8.1.2. Update Output Based on Timer Overflow .............................................. 104
13.1.1.Instruction and CPU Timing ................................................................... 125
13.1.2.MOVX Instruction and Program Memory ............................................... 125
13.2.1.Program Memory ................................................................................... 130
13.2.2.Data Memory.......................................................................................... 131
13.2.3.General Purpose Registers.................................................................... 131
13.2.4.Bit Addressable Locations...................................................................... 131
13.2.5.Stack ..................................................................................................... 131
13.2.6.Special Function Registers .................................................................... 132
13.2.7.Register Descriptions ............................................................................. 148
13.3.1.MCU Interrupt Sources and Vectors ...................................................... 151
13.3.2.External Interrupts.................................................................................. 151
13.3.3.Interrupt Priorities................................................................................... 153
13.3.4.Interrupt Latency .................................................................................... 153
13.3.5.Interrupt Register Descriptions............................................................... 154
13.4.1.Idle Mode ............................................................................................... 160
13.4.2.Stop Mode.............................................................................................. 161
13.2.6.1.SFR Paging ................................................................................... 132
13.2.6.2.Interrupts and SFR Paging ............................................................ 132
13.2.6.3.SFR Page Stack Example ............................................................. 134
Rev. 1.2
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