XC2S400E-6FGG456C Xilinx Inc, XC2S400E-6FGG456C Datasheet - Page 63

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XC2S400E-6FGG456C

Manufacturer Part Number
XC2S400E-6FGG456C
Description
FPGA Spartan®-IIE Family 400K Gates 10800 Cells 357MHz 0.15um Technology 1.8V 456-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-IIEr
Datasheet

Specifications of XC2S400E-6FGG456C

Package
456FBGA
Family Name
Spartan®-IIE
Device Logic Cells
10800
Device Logic Units
2400
Device System Gates
400000
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
329
Ram Bits
163840
Number Of Logic Elements/cells
10800
Number Of Labs/clbs
2400
Total Ram Bits
163840
Number Of I /o
329
Number Of Gates
400000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
456-BBGA
Case
BGA
Dc
05+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1327

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC2S400E-6FGG456C
Manufacturer:
XILINX
Quantity:
201
Part Number:
XC2S400E-6FGG456C
Manufacturer:
XILINX
Quantity:
138
Part Number:
XC2S400E-6FGG456C
Manufacturer:
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Quantity:
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Part Number:
XC2S400E-6FGG456C
Manufacturer:
XILINX
0
Part Number:
XC2S400E-6FGG456C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
PQ208 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E)
DS077-4 (2.3) June 18, 2008
Product Specification
I/O, L28P
VCCINT
VCCO
GND
I/O, L27N
I/O, L27P
I/O
I/O
I/O,
L26N_YY
I/O, VREF
Bank 4,
L26P_YY
I/O
I/O
I/O,
L25N_YY
I/O,
L25P_YY
GND
DONE
VCCO
PROGRAM
I/O (INIT),
L24N_YY
I/O (D7),
L24P_YY
I/O
I/O
Function
Pad Name
R
Bank
4
4
4
4
4
4
4
4
4
4
4
3
3
3
3
3
-
-
-
-
-
-
P100
P101
P102
P103
P104
P105
P106
P107
P108
P109
P110
P89
P90
P91
P92
P93
P94
P95
P96
P97
P98
P99
Pin
100E, 200E,
100E, 200E,
100E, 200E,
XC2S50E,
XC2S50E,
XC2S50E,
Async.
Output
Option
LVDS
300E
300E
300E
All
All
All
All
All
All
-
-
-
-
-
-
-
-
-
-
-
-
-
150E, 200E,
XC2S100E,
XC2S200E,
XC2S200E,
Option
300E
300E
300E
V
All
REF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
www.xilinx.com
PQ208 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E)
I/O, VREF
Bank 3,
L23N
I/O, L23P
I/O
I/O
I/O, L22N
I/O (D6),
L22P
GND
VCCO
VCCINT
I/O (D5),
L21N_YY
I/O,
L21P_YY
I/O,
L20N_YY
I/O,
L20P_YY
GND
I/O, VREF
Bank 3,
L19N
I/O (D4),
L19P
I/O
VCCINT
I/O (TRDY)
VCCO
GND
I/O (IRDY),
L18N_YY
I/O,
L18P_YY
Function
Pad Name
Bank
Spartan-IIE FPGA Family: Pinout Tables
3
3
3
3
3
3
3
3
3
3
3
3
3
3
2
2
-
-
-
-
-
-
-
P111
P112
P113
P114
P115
P116
P117
P118
P119
P120
P121
P122
P123
P124
P125
P126
P127
P128
P129
P130
P131
P132
P133
Pin
150E, 200E,
150E, 200E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
Async.
Output
Option
LVDS
300E
300E
300E
300E
300E
300E
All
All
All
All
All
All
-
-
-
-
-
-
-
-
-
-
-
150E, 200E,
XC2S100E,
Option
V
300E
All
All
REF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
63

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