XC2S50E-6TQ144C Xilinx Inc, XC2S50E-6TQ144C Datasheet - Page 70

• Manufacturer Part Number: XC2S50E-6TQ144C
• Description: FPGA Spartan®-IIE Family 50K Gates 1728 Cells 357MHz 0.15um Technology 1.8V 144-Pin TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-IIEr

Specifications of XC2S50E-6TQ144C

• Package: 144TQFP
• Family Name: Spartan®-IIE
• Device Logic Cells: 1728
• Device Logic Units: 384
• Device System Gates: 50000
• Maximum Internal Frequency: 357 MHz
• Typical Operating Supply Voltage: 1.8 V
• Maximum Number Of User I/os: 102
• Ram Bits: 32768
• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 384
• Total Ram Bits: 32768
• Number Of I /o: 102
• Number Of Gates: 50000
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1204

Spartan-IIE FPGA Family: Pinout Tables
FT256 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E, XC2S400E)
(Continued)
70
I/O, L20P
I/O (DIN, D0),
L19N_YY
I/O (DOUT,
BUSY),
L19P_YY
CCLK
TDO
TDI
I/O (CS),
L18P_YY
I/O (WRITE),
L18N_YY
I/O, L17P
I/O, L17N
I/O, L16P_YY
I/O, L16N_YY
I/O, VREF
Bank 1,
L15P_YY
I/O, L15N_YY
I/O, L14P
I/O, L14N
I/O, L13P
I/O, L13N
Function
Pad Name
Bank
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
-
D14
B16
C15
A15
B14
C13
A14
A13
B13
C12
B12
A12
D12
E11
D11
C11
B11
A11
Pin
100E, 200E,
100E, 200E,
100E, 150E,
100E, 150E,
100E, 200E,
100E, 200E,
XC2S100E,
200E, 300E
300E, 400E
300E, 400E
300E, 400E
300E, 400E
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
Async.
Output
Option
LVDS
300E
300E
All
All
All
All
All
All
All
All
-
-
-
150E, 200E,
XC2S200E,
300E, 400E
XC2S200E,
300E, 400E
XC2S100E,
300E, 400E
Option
V
All
REF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
www.xilinx.com
FT256 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E, XC2S400E)
(Continued)
I/O, L12P
I/O, L12N
I/O
I/O, L11P
I/O, L11N
I/O, VREF
Bank 1, L10P
I/O, L10N
I/O, L9P
I/O, L9N
I/O (DLL), L8P
GCK2, I
GCK3, I
I/O (DLL), L8N
I/O
I/O, L7P
I/O, VREF
Bank 0, L7N
Function
Pad Name
Bank
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
D10
C10
E10
B10
A10
Pin
D9
C9
B9
A9
A8
B8
C8
D8
A7
E7
D7
100E, 200E,
100E, 200E,
200E, 300E,
200E, 300E,
200E, 300E,
200E, 300E,
150E, 200E,
150E, 200E,
200E, 300E,
200E, 300E,
300E, 400E
300E, 400E
DS077-4 (2.3) June 18, 2008
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
Async.
Output
Option
LVDS
400E
400E
400E
400E
400E
400E
400E
400E
Product Specification
-
-
-
-
-
-
XC2S400E
XC2S400E
Option
V
All
All
REF
-
-
-
-
-
-
-
-
-
-
-
-
R