XC2S50E-6TQ144C Xilinx Inc, XC2S50E-6TQ144C Datasheet - Page 97

• Manufacturer Part Number: XC2S50E-6TQ144C
• Description: FPGA Spartan®-IIE Family 50K Gates 1728 Cells 357MHz 0.15um Technology 1.8V 144-Pin TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-IIEr

Specifications of XC2S50E-6TQ144C

• Package: 144TQFP
• Family Name: Spartan®-IIE
• Device Logic Cells: 1728
• Device Logic Units: 384
• Device System Gates: 50000
• Maximum Internal Frequency: 357 MHz
• Typical Operating Supply Voltage: 1.8 V
• Maximum Number Of User I/os: 102
• Ram Bits: 32768
• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 384
• Total Ram Bits: 32768
• Number Of I /o: 102
• Number Of Gates: 50000
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1204

FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
DS077-4 (2.3) June 18, 2008
Product Specification
I/O
I/O, VREF Bank 4,
L114N
I/O, L114P
I/O, L113N
I/O, L113P
I/O
I/O, L112N
I/O, L112P
I/O, L111N
I/O, L111P
I/O
I/O, L110N
I/O, L110P
I/O
I/O, L109N_YY
I/O, VREF Bank 4,
L109P_YY
I/O
I/O, L108N
I/O, L108P
I/O, L107N
I/O, L107P
I/O
I/O, L106N_YY
I/O, VREF Bank 4,
L106P_YY
I/O, L105N_YY
I/O, L105P_YY
I/O, L104N_YY
I/O, L104P_YY
I/O, L103N
I/O, L103P
I/O, L102N_YY
I/O, L102P_YY
Function
Pad Name
R
Bank
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
AC18
AB18
AA18
AB19
AE19
AA19
AE20
AD20
AC20
AB20
AA20
AE21
AD21
AC21
AC22
AE22
AB21
AA21
AE23
AD23
AE24
AF19
AF20
AF21
AF22
AF23
AF24
AF25
W18
Y18
Y19
Y20
Pin
Output Option
LVDS Async.
XC2S600E
XC2S600E
XC2S600E
XC2S600E
XC2S600E
XC2S600E
XC2S600E
XC2S600E
All
All
All
All
All
All
All
All
All
All
-
-
-
-
-
-
-
-
-
-
-
-
-
-
www.xilinx.com
XC2S600E
Option
VREF
All
All
All
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I/O, VREF Bank 4,
I/O, VREF Bank 4,
I/O, VREF Bank 4,
I/O, L109N_YY
I/O, L106N_YY
I/O, L105N_YY
I/O, L105P_YY
I/O, L104N_YY
I/O, L104P_YY
I/O, L102N_YY
I/O, L102P_YY
Spartan-IIE FPGA Family: Pinout Tables
XC2S400E
I/O, L113N
I/O, L111N
I/O, L110N
L109P_YY
I/O, L108N
I/O, L107N
L106P_YY
I/O, L114P
I/O, L113P
I/O, L111P
I/O, L110P
I/O, L108P
I/O, L107P
L114N
I/O
I/O
I/O
I/O
I/O
I/O
Device-Specific Pinouts
-
-
-
-
I/O, VREF Bank 4,
I/O, VREF Bank 4,
I/O, VREF Bank 4,
I/O, VREF Bank 4,
I/O, L109N_YY
I/O, L106N_YY
I/O, L105N_YY
I/O, L105P_YY
I/O, L104N_YY
I/O, L104P_YY
I/O, L102N_YY
I/O, L102P_YY
I/O, L112N_Y
I/O, L111N_Y
I/O, L110N_Y
I/O, L103N_Y
I/O, L111P_Y
I/O, L110P_Y
I/O, L103P_Y
XC2S600E
I/O, L113N
L109P_YY
I/O, L108N
I/O, L107N
L106P_YY
I/O, L114P
I/O, L113P
I/O, L108P
I/O, L107P
L112P_Y
L114N
I/O
I/O
I/O
I/O
I/O
I/O
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