XC3S1200E-4FG400I Xilinx Inc, XC3S1200E-4FG400I Datasheet - Page 198

• Manufacturer Part Number: XC3S1200E-4FG400I
• Description: FPGA Spartan®-3E Family 1.2M Gates 19512 Cells 572MHz 90nm (CMOS) Technology 1.2V 400-Pin FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3Er

Specifications of XC3S1200E-4FG400I

• Package: 400FBGA
• Family Name: Spartan®-3E
• Device Logic Cells: 19512
• Device Logic Units: 2168
• Device System Gates: 1200000
• Number Of Registers: 17344
• Maximum Internal Frequency: 572 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 304
• Ram Bits: 516096
• Number Of Logic Elements/cells: 19512
• Number Of Labs/clbs: 2168
• Total Ram Bits: 516096
• Number Of I /o: 304
• Number Of Gates: 1200000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Pinout Descriptions
Table 143: FT256 Package Pinout (Continued)
198
Bank
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
N.C. ( )
N.C. ( )
IO_L18N_3
IO_L18P_3
IO_L19N_3
IO_L19P_3
IP
IP
IO
IP
IP
IP
IP
IP
IP/VREF_3
IO/VREF_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XC3S250E Pin Name
IO_L17N_3
IO_L17P_3
IO_L18N_3
IO_L18P_3
IO_L19N_3
IO_L19P_3
IP
IP
IO
IP
IP
IP
IP
IP
IP/VREF_3
IO/VREF_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XC3S500E Pin Name
www.xilinx.com
IO_L17N_3
IO_L17P_3
IO_L18N_3
IO_L18P_3
IO_L19N_3
IO_L19P_3
IP
IP
IP
IP
IP
IP
IP
IP
IP/VREF_3
IP/VREF_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XC3S1200E Pin Name
DS312-4 (v3.8) August 26, 2009
FT256
G10
Ball
A16
F11
M4
M3
G1
G6
M2
G7
G8
G9
P1
P2
R1
R2
D2
H1
K4
N3
N2
E2
K6
A1
B9
H2
H7
H8
H9
L4
F2
F5
J6
F6
Product Specification
250E: VREF(I/O)
500E: VREF(I/O)
1200E: INPUT
VREF(INPUT)
250E: N.C.
250E: N.C.
1200E: I/O
1200E: I/O
500E: I/O
500E: I/O
250E: I/O
500E: I/O
1200E:
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VREF
Type
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
I/O
I/O
I/O
I/O
R