XC3S1400AN-5FGG676C Xilinx Inc, XC3S1400AN-5FGG676C Datasheet - Page 119
![FPGA Spartan®-3AN Family 1.4M Gates 25344 Cells 770MHz 90nm Technology 1.2V 676-Pin FBGA](/photos/6/73/67300/b-676_sml.jpg)
XC3S1400AN-5FGG676C
Manufacturer Part Number
XC3S1400AN-5FGG676C
Description
FPGA Spartan®-3AN Family 1.4M Gates 25344 Cells 770MHz 90nm Technology 1.2V 676-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3S50AN-4TQG144C.pdf
(2 pages)
3.XC3S50AN-4TQG144C.pdf
(123 pages)
Specifications of XC3S1400AN-5FGG676C
Package
676FBGA
Family Name
Spartan®-3AN
Device Logic Units
25344
Device System Gates
1400000
Maximum Internal Frequency
770 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
502
Ram Bits
589824
Number Of Logic Elements/cells
25344
Number Of Labs/clbs
2816
Total Ram Bits
589824
Number Of I /o
502
Number Of Gates
1400000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1600
XC3S1400AN-5FGG676C
XC3S1400AN-5FGG676C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S1400AN-5FGG676C
Manufacturer:
XILINX
Quantity:
490
Company:
Part Number:
XC3S1400AN-5FGG676C
Manufacturer:
Xilinx Inc
Quantity:
10 000
User I/Os by Bank
Table 83
The AWAKE pin is counted as a dual-purpose I/O.
Table 83: User I/Os Per Bank for the XC3S1400AN in the FGG676 Package
Footprint Migration Differences
The XC3S1400AN is the only Spartan-3AN FPGA offered in the FGG676 package. The XC3S1400AN FPGA is pin
compatible with the Spartan-3A XC3S1400A FPGA in the FG(G)676 package, although the Spartan-3A FPGA requires an
external configuration source.
DS557 (v4.1) April 1, 2011
Product Specification
Top
Right
Bottom
Left
Package
Edge
Total
indicates how the 502 available user-I/O pins are distributed between the four I/O banks on the FGG676 package.
I/O Bank
0
1
2
3
Maximum I/Os
120
130
120
132
502
313
I/O
82
67
67
97
www.xilinx.com
INPUT
20
15
14
18
67
All Possible I/O Pins by Type
Spartan-3AN FPGA Family: Pinout Descriptions
DUAL
30
21
52
1
0
VREF
10
10
38
9
9
CLK
32
8
8
8
8
119