XC3S1500-4FGG676C Xilinx Inc, XC3S1500-4FGG676C Datasheet - Page 39
![FPGA Spartan®-3 Family 1.5M Gates 29952 Cells 630MHz 90nm Technology 1.2V 676-Pin FBGA](/photos/6/73/67300/b-676_sml.jpg)
XC3S1500-4FGG676C
Manufacturer Part Number
XC3S1500-4FGG676C
Description
FPGA Spartan®-3 Family 1.5M Gates 29952 Cells 630MHz 90nm Technology 1.2V 676-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S1500-4FGG676C
Package
676FBGA
Family Name
Spartan®-3
Device Logic Units
29952
Device System Gates
1500000
Maximum Internal Frequency
630 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
487
Ram Bits
589824
Number Of Logic Elements/cells
29952
Number Of Labs/clbs
3328
Total Ram Bits
589824
Number Of I /o
487
Number Of Gates
1500000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
NANO-SPARTAN - KIT NANOBOARD AND SPARTAN3 DC807-1001 - DAUGHTER CARD XILINX SPARTAN 3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1337
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S1500-4FGG676C
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XILINX
Quantity:
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Company:
Part Number:
XC3S1500-4FGG676C
Manufacturer:
XILINX
Quantity:
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Company:
Part Number:
XC3S1500-4FGG676C
Manufacturer:
XilinxInc
Quantity:
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Company:
Part Number:
XC3S1500-4FGG676C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3S1500-4FGG676C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
DS099-2 (v2.5) December 4, 2009
Product Specification
Notes:
1.
2.
P represents the integer value ranging from –255 to +255 to which the PHASE_SHIFT attribute is assigned.
N is an integer value ranging from –255 to +255 that represents the net phase shift effect from a series of increment and/or
decrement operations.
N = {Total number of increments} – {Total number of decrements}
A positive value for N indicates a net increment; a negative value indicates a net decrement.
a. CLKOUT_PHASE_SHIFT = NONE
b. CLKOUT_PHASE_SHIFT = FIXED
c. CLKOUT_PHASE_SHIFT = VARIABLE
R
Shift Range over all P Values:
Shift Range over all P Values:
Shift Range over all N Values:
CLKFB before
CLKFB after
Decrement
Decrement
CLKIN
CLKFB
CLKIN
CLKFB
CLKIN
Figure 21: Phase Shifter Waveforms
–255
–255
www.xilinx.com
–255
Spartan-3 FPGA Family: Functional Description
0
0
256
256
P
P
256
N
* T
* T
* T
CLKIN
CLKIN
CLKIN
0
+255
+255
DS099-2_11_031303
+255
39