XC3S200-4FTG256C Xilinx Inc, XC3S200-4FTG256C Datasheet - Page 13

• Manufacturer Part Number: XC3S200-4FTG256C
• Description: FPGA Spartan®-3 Family 200K Gates 4320 Cells 630MHz 90nm Technology 1.2V 256-Pin FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3r

Specifications of XC3S200-4FTG256C

• Package: 256FTBGA
• Family Name: Spartan®-3
• Device Logic Units: 4320
• Device System Gates: 200000
• Maximum Internal Frequency: 630 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 173
• Ram Bits: 221184
• Number Of Logic Elements/cells: 4320
• Number Of Labs/clbs: 480
• Total Ram Bits: 221184
• Number Of I /o: 173
• Number Of Gates: 200000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1338

DS099-2 (v2.5) December 4, 2009
Product Specification
OTCLK1
OTCLK2
ICLK1
ICLK2
TCE
OCE
REV
ICE
IQ1
IQ2
T1
T2
SR
O1
O2
T
I
R
Note: All IOB signals originating from the FPGA's internal logic have an optional polarity inverter.
D
CE
CK
D
CE
CK
D
CE
CK
D
CE
CK
D
CE
CK
D
CE
CK
SR
SR
SR
SR
SR
SR
REV
REV
REV
REV
REV
REV
Q
Q
Q
Q
Q
Q
Figure 5: Simplified IOB Diagram
TFF1
TFF2
OFF1
OFF2
IFF1
IFF2
MUX
DDR
DDR
MUX
www.xilinx.com
Delay
Fixed
Delay
Fixed
Three-state Path
Output Path
Input Path
Spartan-3 FPGA Family: Functional Description
Program-
Output
mable
Driver
Single-ended Standards
LVCMOS, LVTTL, PCI
Differential Standards
using V REF
DCI
Pull-Up
Down
Pull-
Keeper
Latch
DS099-2_01_112905
ESD
ESD
V
Pin
I/O Pin
from
Adjacent
IOB
V
CCO
REF
I/O
Pin
13