AD1671JP Analog Devices Inc, AD1671JP Datasheet - Page 11

• Manufacturer Part Number: AD1671JP
• Description: ADC Single Pipelined 1.25MSPS 12-Bit Parallel 28-Pin PLCC
• Manufacturer: Analog Devices Inc

Specifications of AD1671JP

• Package: 28PLCC
• Resolution: 12 Bit
• Sampling Rate: 1250 KSPS
• Architecture: Pipelined
• Number Of Analog Inputs: 1
• Digital Interface Type: Parallel
• Input Type: Voltage
• Polarity Of Input Voltage: Unipolar|Bipolar
• Rohs Status: RoHS non-compliant
• Number Of Bits: 12
• Sampling Rate (per Second): 1.25M
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 750mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-LCC (J-Lead)

REV. B
OUTPUT DATA FORMAT
The AD1671 provides both MSB and MSB outputs, delivering
data in positive true straight binary for unipolar input ranges
and positive true offset binary or twos complement for bipolar
input ranges. Straight binary coding is used for systems that ac-
cept positive-only signals. If straight binary coding is used with
bipolar input signals, a 0 V input would result in a binary output
of 2048. The application software would have to subtract 2048
to determine the true input voltage. Host registers typically per-
form math on signed integers and assume data is in that format.
Twos complement format minimizes software overhead which is
especially important in high speed data transfers, such as a
DMA operation. The CPU is not bogged down performing data
conversion steps, hence the total system throughput is increased.
OPTIONAL EXTERNAL REFERENCE
The AD1671 includes an onboard +2.5 V reference. The refer-
ence input pin (REF IN) can be connected to reference output
pin (REF OUT) or a standard external +2.5 V reference can be
selected to meet specific system requirements. Fast switching in-
put dependent currents are modulated at the reference input.
The reference input voltage can be held with the use of a capaci-
tor. To prevent the AD1671’s onboard reference from oscil-
lating when not connected to REF IN, REF OUT must be
Input
Range
0 V to +2.5 V
0 V to +5 V
–2.5 V to +2.5 V Offset Binary
–5 V to +5 V
–2.5 V to +2.5 V Twos Complement
–5 V to +5 V
NOTES
1
2
Voltages listed are with offset and gain errors adjusted to zero.
Typical performance.
Coding
Straight Binary
Straight Binary
Offset Binary
(Using MSB)
Twos Complement
(Using MSB)
Table III. Output Data Format
–11–
Analog
Input
0 V
+2.5 V
0 V
+5 V
–2.5 V
+2.5 V
–5 V
+5 V
–2.5 V
+2.5 V
–5 V
+5 V
–0.0003 V
+2.5003 V
+5.0006 V
–2.5006 V
+2.4994 V
–5.0012 V
+4.9988 V
–2.5006 V
+2.4994 V
–5.0012 V
+4.9988 V
–0.0006 V
connected to +5 V. It is possible to connect REF OUT to +5 V
due to its output circuit implementation which shuts down the
reference.
I
Figure 15 is the typical logic supply current vs. conversion rate
for various capacitor loads on the digital outputs.
LOGIC
l
Figure 15. I
Capacitive Loads on the Digital Outputs
VS. CONVERSION RATE
1.5
1.0
0.5
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1k
Digital
Output
0000 0000 0000
0000 0000 0000
1111 1111 1111
1111 1111 1111
0000 0000 0000
0000 0000 0000
1111 1111 1111
1111 1111 1111
0000 0000 0000
0000 0000 0000
1111 1111 1111
1111 1111 1111
0000 0000 0000
0000 0000 0000
1111 1111 1111
1111 1111 1111
1000 0000 0000
1000 0000 0000
0111 1111 1111
0111 1111 1111
1000 0000 0000
1000 0000 0000
0111 1111 1111
0111 1111 1111
LOGIC
vs. Conversion Rate for Various
CONVERSION RATE – Hz
10k
OTR
0
0
1
0
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
CL = 30pF
2
100k
AD1671
CL = 50pF
CL = 0pF
1M