CY2308SC-1HT Cypress Semiconductor Corp, CY2308SC-1HT Datasheet - Page 7

Phase Locked Loops (PLL) 3. 3V ZDB Internal Feedck

CY2308SC-1HT

Manufacturer Part Number
CY2308SC-1HT
Description
Phase Locked Loops (PLL) 3. 3V ZDB Internal Feedck
Manufacturer
Cypress Semiconductor Corp
Type
Zero Delay PLL Clock Bufferr
Datasheet

Specifications of CY2308SC-1HT

Number Of Circuits
1
Output Frequency Range
10 MHz to 133.3 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
SOIC-16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY2308SC-1HT
Manufacturer:
CY
Quantity:
2 300
Part Number:
CY2308SC-1HT
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Switching Characteristics for Industrial Temperature Devices
Document Number: 38-07146 Rev. *E
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Parameter
1
1
1
3
3
3
4
4
4
5
6
7
8
J
J
LOCK
Output Frequency
Output Frequency
Output Frequency
Duty Cycle
(–1, –2, –3, –4, –1H, –5H)
Duty Cycle
(–1, –2, –3, –4, –1H, –5H)
Rise Time
(–1, –2, –3, –4)
Rise Time
(–1, –2, –3, –4)
Rise Time
(–1H, –5H)
Fall Time
(–1, –2, –3, –4)
Fall Time
(–1, –2, –3, –4)
Fall Time
(–1H, –5H)
Output to Output Skew on
same Bank (–1, –2, –3, –4)
Output to Output Skew
(–1H, –5H)
Output Bank A to Output
Bank B Skew (–1, –4, –5H)
Output Bank A to Output
Bank B Skew (–2, –3)
Delay, REF Rising Edge to
FBK Rising Edge
Device to Device Skew
Output Slew Rate
Cycle to Cycle Jitter
(–1, –1H, –4, –5H)
Cycle to Cycle Jitter
(–2, –3)
PLL Lock Time
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
Name
= t
= t
[7]
2
2
[7]
[7]
÷ t
÷ t
[7]
[7]
1
1
[7]
[7]
30 pF load, All devices
20 pF load, –1H, –5H devices
15 pF load, –1, –2, –3, –4 devices
Measured at 1.4V, F
30 pF load
Measured at 1.4V, F
15 pF load
Measured between 0.8V and 2.0V,
30 pF load
Measured between 0.8V and 2.0V,
15 pF load
Measured between 0.8V and 2.0V,
30 pF load
Measured between 0.8V and 2.0V,
30 pF load
Measured between 0.8V and 2.0V,
15 pF load
Measured between 0.8V and 2.0V,
30 pF load
All outputs equally loaded
All outputs equally loaded
All outputs equally loaded
All outputs equally loaded
Measured at V
Measured at V
devices
Measured between 0.8V and 2.0V on –1H,
–5H device using Test Circuit 2
Measured at 66.67 MHz, loaded outputs,
15 pF load
Measured at 66.67 MHz, loaded outputs,
30 pF load
Measured at 133.3 MHz, loaded outputs,
15 pF load
Measured at 66.67 MHz, loaded outputs
30 pF load
Measured at 66.67 MHz, loaded outputs
15 pF load
Stable power supply, valid clocks
presented on REF and FBK pins
Test Conditions
DD
DD
/2
/2 on the FBK pins of
OUT
OUT
= 66.66 MHz
<50.0 MHz
[9]
[8]
40.0
45.0
Min
10
10
10
1
50.0
50.0
Typ
75
0
0
133.3
133.3
±250
Max
60.0
55.0
2.50
1.50
1.50
2.50
1.50
1.25
100
200
200
200
400
700
200
200
100
400
400
1.0
CY2308
Page 7 of 15
MHz
MHz
MHz
V/ns
Unit
ms
ns
ns
ns
ns
ns
ns
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
%
%
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