ATA559001-DBW Atmel, ATA559001-DBW Datasheet - Page 15

• Manufacturer Part Number: ATA559001-DBW
• Description: RF Wireless Misc UHF (1kbit r/w anti- collis. Ni-Au)
• Manufacturer: Atmel

Specifications of ATA559001-DBW

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.1.5
3.2
3.3
3.3.1
4817C–RFID–03/07
User System Information Block
Manufacturer System Information
ID_type Coding
Manufacturer System Information Byte 8
The ID_type is an 8-bit value defined according to the DSF information in ISO/IEC 15962.
Therefore, the ID is defined by the lower 5 bits of the DSFID information. The codes for the dif-
ferent ID structures are defined as:
Code 00 enables migration paths for private or closed-system numbering systems.
Note:
The second page of the system memory is available for private system management indication.
This page is in the system memory at page address 1. The symbolic address is 1h.
After sawing, the MSByte of the upper block can be programmed using an OTP mechanism.
The MSB is the lock bit of the three lower blocks of the page. The MSBlock of this page will not
be locked against programming (except the upper byte of this block, which is OTP). Therefore,
the user can use the three lower bytes of the upper block for changeable data such as the pack-
aging level information, a CRC, etc.
To protect the three lower blocks of the page against over programming, the lock bit must be set.
The user system information can be read out by read32c or read128c commands, or by using
the get_system informational command.
Information regarding the functionality of the chip and other reference data is stored in the man-
ufacturer system information blocks.
This information is stored in the system memory area of the EEPROM, and can be read out
directly by a get_system command. Programming is possible during wafer test. After sawing,
only the 8th byte can be reprogrammed by using a sequence of arbitration and prognbyte com-
mands. The physical page address is 2h, as is the symbolic address.
The system information is split in 8 bytes (64 bits)
Table 3-4.
Trigger_en = “1” indicates that the trigger function is selected
Trigger(0) defines the frequency of the sub-carrier:
The definition of the following bytes is reserved for further use, based on the described protocol
mechanism.
Trigger_en
• 00 to 0B reserved by ISO/IEC 15961 (see section 7.1.2.5 of ISO/IEC 15961 and 7.2 of
• 0C to 1F: RFU
ISO/IEC 15962)
Bit 7
0
“0” = OSC / 4
“1” = OSC / 8
As the anticollision commands support an auto decrement function of the memory address, the ID
can have more then 96 bits. The other information may then be located at address 1F, 1E, etc.
Trigger(0)
Manufacturer System Information, 8th Byte
Bit 6
0
Bit 5
RFU
0
Bit 4
RFU
0
Bit 3
RFU
0
Bit 2
RFU
0
Bit 1
RFU
0
ATA5590
Bit 0
RFU
0
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