ISP1505CBS,551 NXP Semiconductors, ISP1505CBS,551 Datasheet - Page 52
ISP1505CBS,551
Manufacturer Part Number
ISP1505CBS,551
Description
RF Transceiver USB2.0 ULPI HOST/DEV
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1505ABS557.pdf
(76 pages)
Specifications of ISP1505CBS,551
Operating Supply Voltage
1.65 V to 3.6 V
Mounting Style
SMD/SMT
Package / Case
HVQFN-24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935278317551 ISP1505CBS-S
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NXP Semiconductors
Table 41.
ISP1505A_ISP1505C_3
Product data sheet
Bit
7 to 4
3
2
1
0
Symbol
-
BVALID_FALL
BVALID_RISE
-
IGNORE_RESET
Power Control register (address R = 3Dh to 3Fh, W = 3Dh, S = 3Eh, C = 3Fh) bit description
10.2 Extended register set
Addresses 00h to 3Fh of the extended register set directly map to the immediate set. This
means a read, write, set or clear operation to these extended addresses will operate on
the immediate register set.
Addresses 40h to FFh are not implemented. Operating on these addresses may result in
undefined behavior of the PHY.
Description
reserved; the link must never write logic 1 to these bits.
BVALID Fall: Enables RXCMDs for HIGH-to-LOW transitions on BVALID. When BVALID
changes from HIGH to LOW, the ISP1505 will send an RXCMD to the link with the ALT_INT
bit set to logic 1.
This bit is optional and is not necessary for OTG devices. This bit is provided for debugging
purposes. The session valid comparator should be used instead.
BVALID Rise: Enables RXCMDs for LOW-to-HIGH transitions on BVALID. When BVALID
changes from LOW to HIGH, the ISP1505 will send an RXCMD to the link with the ALT_INT
bit set to logic 1.
This bit is optional and is not necessary for OTG devices. This bit is provided for debugging
purposes. The session valid comparator should be used instead.
reserved
Ignore Reset: Selects between the RESET_N and PSW_N functions of the
RESET_N/PSW_N pin. The link must set this bit to logic 1, if PSW_N is used in a ganged
mode configuration.
0b — The RESET_N/PSW_N pin behaves as an active-LOW reset input (RESET_N). This is
the default setting.
1b — The RESET_N/PSW_N pin behaves as an active-LOW power switch output (PSW_N).
Rev. 03 — 26 August 2008
ULPI HS USB host and peripheral transceiver
ISP1505A; ISP1505C
© NXP B.V. 2008. All rights reserved.
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