8531AY-01 Integrated Device Technology (Idt), 8531AY-01 Datasheet - Page 9

• Manufacturer Part Number: 8531AY-01
• Description: Clock Driver 2-IN LVPECL 32-Pin TQFP Tray
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 8531AY-01

• Package: 32TQFP
• Configuration: 1 x 2:1
• Input Signal Type: CML|GTL|HCSL|LVCMOS|LVDS|LVHSTL|LVPECL|LVTTL|SSTL
• Maximum Output Frequency: 500 MHz
• Operating Supply Voltage: 3.3 V

F
F
F
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
V
examples for the HiPerClockS CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here are
IDT
IGURE
IGURE
IGURE
PP
IFFERENTIAL
ICS8531-01
LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
™
3.3V
and V
R5,R6 locate near the driver pin.
/ ICS
3.3V
LVPECL
3A. H
3C. H
3E. H
™
1.8V
CMR
LVPECL
1-TO-9, 3.3V LVPECL FANOUT BUFFER
R5
100 - 200
input requirements. Figures 3A to 3E show interface
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
IDT H
3.3V LVPECL D
3.3V LVPECL D
I
I
I
P
P
P
C
ER
ER
ER
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
R6
100 - 200
Zo = 50 Ohm
Zo = 50 Ohm
C
C
C
I
P
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
LOCK
LOCK
ER
C
I
NPUT
LOCK
S CLK/nCLK I
S CLK/nCLK I
S CLK/
S LVHSTL D
RIVER WITH
RIVER
R1
50
3.3V
R3
125
C1
C2
I
NTERFACE
R1
84
N
CLK I
3.3V
R3
125
R2
50
R4
125
SWING
R1
84
R2
84
CLK
nCLK
R4
125
and V
AC C
NPUT
R2
84
NPUT
NPUT
CLK
nCLK
3.3V
3.3V
RIVER
HiPerClockS
Input
OH
HiPerClockS
Input
D
D
D
OUPLE
CLK
nCLK
RIVEN BY
RIVEN BY
must meet the
RIVEN BY
3.3V
HiPerClockS
Input
9
examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in Figure 3A, the input termination applies for IDT
HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver
from another vendor, use their termination recommendation.
F
F
IGURE
IGURE
3.3V
3.3V
3D. H
3B. H
LVDS_Driv er
LVPECL
3.3V LVPECL D
3.3V LVDS D
I
I
P
P
Zo = 50 Ohm
Zo = 50 Ohm
ER
ER
C
C
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
S CLK/nCLK I
S CLK/nCLK I
RIVER
ICS8531AY-01 REV. F APRIL 11, 2007
R1
50
R3
50
RIVER
R2
50
R1
100
CLK
nCLK
3.3V
NPUT
NPUT
HiPerClockS
Input
CLK
nCLK
D
D
3.3V
RIVEN BY
RIVEN BY
Receiv er