SCANSTAEVK/NOPB National Semiconductor, SCANSTAEVK/NOPB Datasheet - Page 20

• Manufacturer Part Number: SCANSTAEVK/NOPB
• Manufacturer: National Semiconductor

Specifications of SCANSTAEVK/NOPB

• Lead Free Status / RoHS Status: Compliant

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Special Features
This moves the local chain TAP Controllers to the synchro-
nization state (Run-Test/Idle), where they stay until synchro-
nization occurs. If the next state of the ’STA111 TAP Control-
ler is Run-Test/Idle, TMS
local TAP Controllers are synchronized to the ’STA111 TAP
Controller as shown in Figure 12. If the next state after
Update-IR were Select-DR, TMS
synchronization would not occur until the ’STA111 TAP Con-
troller entered the Run-Test/Idle state, as shown in Figure
11.
Each local port has its own Local Scan Port Controller. This
is necessary because the LSPN can be configured in any
one of eight (8) possible combinations. Either one, some, or
all of the local ports can be accessed simultaneously. Con-
figuring the LSPN is accomplished with Mode Register
conjunction with the UNPARK instruction.
The LSPN can be unparked in one of seven different con-
figurations (Si device), as specified by bits 0-2 of Mode
Register
synchronizing the ’STA111 TAP Controller with the TAP Con-
trollers of an individual local port, but also of synchronizing
the individual local ports to one another.
When multiple local ports are selected for access, it is pos-
sible that two ports are parked in different states. This could
occur when previous operations accessed the two ports
separately and parked them in the two different states. The
LSP Controllers handle this situation gracefully. Figure 12
shows the UNPARK instruction being used to access LSP
0
. Using multiple ports presents not only the task of
n
is connected to TMS
FIGURE 11. Local Scan Port Synchronization on Second Pass
(Continued)
FIGURE 12. Synchronization of the Three Local Scan Ports
n
would remain low and
B
and the
0
, in
0
,
20
LSP
binary). LSP
troller is sequenced through the Run-Test/Idle state. LSP
remains parked in the Pause-DR state until the ’STA111 TAP
Controller is sequenced through the Pause-DR state. At that
point, all three local ports are synchronized for access via
the active scan chain.
PARAMETERIZED DESIGN (HDL)
In order to support a large number of applications, the
STA111 HDL is to parameterized as described:
• Number of Local Scan Ports (LSPs): The STA111 HDL
• Number of Address Pins: The STA111 has a selectable
• Pass-Through Pins: Each of the LSPs (0-n) may selec-
is able to simulate/synthesize a device that contains from
1 to 8 LSPs. LSP
Register
Mode Register
number of address bits (S
5 to 7). Addresses 3A through 3F hex are reserved for
address interrogation, broadcast and multi-cast address-
ing.
tivly have or not have Pass-through pins. Pass-through
pins are described in more detail below.
1
, and LSP
0
0
and LSP
and LSP
2
1
in series (Mode Register
.
0
through LSP
1
5
become active as the ’STA111 con-
through LSP
0
- S
n
, where n can range from
4
are controlled via Mode
7
are controlled via
0
= XXX0X111
10124514
10124515
2