74LVC125APW-T NXP Semiconductors, 74LVC125APW-T Datasheet - Page 10

• Manufacturer Part Number: 74LVC125APW-T
• Description: Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R
• Manufacturer: NXP Semiconductors

Specifications of 74LVC125APW-T

• Package: 14TSSOP
• Logic Family: LVC
• Logic Function: Buffer/Line Driver
• Number Of Outputs Per Chip: 4
• Output Type: 3-State
• Input Signal Type: Single-Ended
• Maximum Propagation Delay Time @ Maximum Cl: 2.4(Typ)@3.3V ns
• Tolerant I/os: 5 V
• Typical Quiescent Current: 0.1 uA
• Polarity: Non-Inverting

Philips Semiconductors
2003 May 07
handbook, full pagewidth
Quad buffer/line driver with 5 V tolerant input/outputs;
3-state
Definitions for test circuit:
R
C
R
t
t
t
L
L
T
PLH
PLZ
PHZ
= Load resistor.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
/t
/t
/t
PZL
TEST
PHL
PZH
SWITCH POSITION
open
2
GND
SWITCH
V
CC
GENERATOR
PULSE
Fig.8 Load circuitry for switching times.
< 2.7 V
2.7 to 3.6 V
V I
V
CC
R T
D.U.T.
V CC
o
10
of the pulse generator.
V
2.7 V
CC
V O
V
I
50 pF
C L
500
500
R L
R L
S1
MNA368
2
open
GND
V CC
Product specification
74LVC125A