74LVC125APW-T NXP Semiconductors, 74LVC125APW-T Datasheet - Page 13

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74LVC125APW-T

Manufacturer Part Number
74LVC125APW-T
Description
Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC125APW-T

Package
14TSSOP
Logic Family
LVC
Logic Function
Buffer/Line Driver
Number Of Outputs Per Chip
4
Output Type
3-State
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
2.4(Typ)@3.3V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting
Philips Semiconductors
2003 May 07
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
Quad buffer/line driver with 5 V tolerant input/outputs;
3-state
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
OUTLINE
VERSION
SOT402-1
max.
1.1
A
0.15
0.05
A
1
0.95
0.80
14
A
1
2
y
IEC
0.25
Z
pin 1 index
A
e
3
D
0.30
0.19
b
p
MO-153
JEDEC
0.2
0.1
c
b
p
8
7
REFERENCES
D
5.1
4.9
0
(1)
w
M
E
4.5
4.3
(2)
JEITA
scale
0.65
2.5
13
e
c
A
H
6.6
6.2
2
E
A
1
5 mm
L
1
0.75
0.50
L
H
p
E
E
detail X
0.4
0.3
Q
L
L
PROJECTION
EUROPEAN
p
0.2
v
Q
A
(A )
0.13
3
w
Product specification
X
74LVC125A
v
0.1
A
y
M
ISSUE DATE
A
99-12-27
03-02-18
0.72
0.38
Z
(1)
SOT402-1
8
0
o
o

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