LCMXO640C-3TN100I LATTICE SEMICONDUCTOR, LCMXO640C-3TN100I Datasheet - Page 11
LCMXO640C-3TN100I
Manufacturer Part Number
LCMXO640C-3TN100I
Description
CPLD MachXO Family 320 Macro Cells 1.8V/2.5V/3.3V 100-Pin TQFP Tray
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LCMXO1200C-3FTN256I.pdf
(96 pages)
Specifications of LCMXO640C-3TN100I
Package
100TQFP
Family Name
MachXO
Number Of Macro Cells
320
Maximum Propagation Delay Time
4.9 ns
Number Of User I/os
74
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Memory Type
SRAM
Operating Temperature
-40 to 100 °C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO640C-3TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Figure 2-8. Primary Clocks for MachXO1200 and MachXO2280 Devices
Four secondary clocks are generated from four 16:1 muxes as shown in Figure 2-9. Four of the secondary clock
sources come from dual function clock pins and 12 come from internal routing.
Figure 2-9. Secondary Clocks for MachXO Devices
Routing
Routing
12
Up to 9
Clock
Pads
Clock
Pads
4
4
Outputs
PLL
Up to 6
2-8
16:1
16:1
16:1
16:1
16:1
16:1
16:1
16:1
Primary Clock 0
Primary Clock 1
Primary Clock 2
Primary Clock 3
Secondary (Control)
Clocks
MachXO Family Data Sheet
Architecture
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