LCMXO640C-3TN100I LATTICE SEMICONDUCTOR, LCMXO640C-3TN100I Datasheet - Page 35
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LCMXO640C-3TN100I
Manufacturer Part Number
LCMXO640C-3TN100I
Description
CPLD MachXO Family 320 Macro Cells 1.8V/2.5V/3.3V 100-Pin TQFP Tray
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LCMXO1200C-3FTN256I.pdf
(96 pages)
Specifications of LCMXO640C-3TN100I
Package
100TQFP
Family Name
MachXO
Number Of Macro Cells
320
Maximum Propagation Delay Time
4.9 ns
Number Of User I/os
74
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Memory Type
SRAM
Operating Temperature
-40 to 100 °C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO640C-3TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Table 3-1. LVDS DC Conditions
BLVDS
The MachXO family supports the BLVDS standard through emulation. The output is emulated using complemen-
tary LVCMOS outputs in conjunction with a parallel external resistor across the driver outputs. The input standard
is supported by the LVDS differential input buffer on certain devices. BLVDS is intended for use when multi-drop
and bi-directional multi-point differential signaling is required. The scheme shown in Figure 3-2 is one possible
solution for bi-directional multi-point differential signals.
Figure 3-2. BLVDS Multi-point Output Example
Z
R
R
R
V
V
V
V
Z
I
DC
OUT
OH
OL
OD
CM
BACK
S
P
T
Parameter
16mA
16mA
2.5V
2.5V
+
-
Output impedance
Driver series resistor
Driver parallel resistor
Receiver termination
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
Back impedance
DC output current
80
80
Heavily loaded backplane, effective Zo ~ 45 to 90 ohms differential
2.5V
Over Recommended Operating Conditions
45-90 ohms
80
16mA
Description
2.5V
80
16mA
3-9
-
. . .
. . .
2.5V
80
16mA
Typical
1.43
1.07
0.35
1.25
3.66
294
121
100
100
20
DC and Switching Characteristics
2.5V
80
45-90 ohms
16mA
MachXO Family Data Sheet
80
-
2.5V
2.5V
16mA
16mA
+
-
Units
mA
V
V
V
V