85411AMLF IDT, Integrated Device Technology Inc, 85411AMLF Datasheet

85411AMLF

Manufacturer Part Number
85411AMLF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 85411AMLF

Number Of Outputs
4
Operating Supply Voltage (max)
3.63V
Operating Temp Range
0C to 70C
Propagation Delay Time
2.5ns
Operating Supply Voltage (min)
2.97V
Mounting
Surface Mount
Pin Count
8
Operating Supply Voltage (typ)
3.3V
Package Type
SOIC
Input Frequency
650MHz
Duty Cycle
53%
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-
LVDS FANOUT BUFFER
B
IDT
G
put levels.The ICS85411 is characterized to operate from
a 3.3V power supply. Guaranteed output and par t-to-par t
skew characteristics make the ICS85411 ideal for those
clock distribution applications demanding well defined per-
for mance and repeatability.
HiPerClockS™
IC S
LOCK
ENERAL
/ ICS
DIFFERENTIAL-TO-LVDS FANOUT BUFFER
nCLK
D
CLK
The ICS85411 is a low skew, high performance
1-to-2 Differential-to-LVDS Fanout Buffer and a
member of the HiPerClock S™ family of High
Performance Clock Solutions from IDT. The CLK,
nCLK pair can accept most standard differential in-
IAGRAM
D
Pullup
Pulldown
ESCRIPTION
Q0
nQ0
Q1
nQ1
1
P
F
Two differential LVDS outputs
One differential CLK, nCLK clock input
CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
Maximum output frequency: 650MHz
Translates any single ended input signal to
LVDS levels with resistor bias on nCLK input
Output skew: 20ps (maximum)
Part-to-part skew: 250ps (maximum)
Additive phase jitter, RMS: 0.05ps (typical)
Propagation delay: 2.5 ns (maximum)
3.3V operating supply
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead free (RoHS 6)
packages
IN
EATURES
A
SSIGNMENT
3.90mm x 4.90mm x 1.37mm package body
nQ0
nQ1
Q0
Q1
8-Lead SOIC
ICS85411
M Package
ICS85411AM REV. C JANUARY 20, 2009
Top View
1
2
3
4
8
7
6
5
V
CLK
nCLK
GND
DD
ICS85411

Related parts for 85411AMLF

85411AMLF Summary of contents

Page 1

LOW SKEW, 1-TO-2 DIFFERENTIAL-TO- LVDS FANOUT BUFFER G D ENERAL ESCRIPTION The ICS85411 is a low skew, high performance IC S 1-to-2 Differential-to-LVDS Fanout Buffer and a HiPerClockS™ member of the HiPerClock S™ family of High Performance Clock Solutions from ...

Page 2

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER ABLE IN ESCRIPTIONS ...

Page 3

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs Continuous Current 10mA Surge Current 15mA Package Thermal Impedance, JA Storage Temperature, T -65°C ...

Page 4

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER 3.3V±10% T ABLE HARACTERISTICS ...

Page 5

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a ...

Page 6

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER P ARAMETER V 3.3V±10% DD POWER SUPPLY LVDS + Float GND – 3. UTPUT OAD EST IRCUIT nQx PART 1 Qx nQy PART 2 Qy tsk(pp ...

Page 7

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER P ARAMETER V DD LVDS DC Input ➤ FFSET OLTAGE ETUP V DD LVDS DC Input UTPUT HORT IRCUIT URRENT ETUP IDT ™ / ICS ...

Page 8

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER IRING THE IFFERENTIAL NPUT TO Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V generated by the bias ...

Page 9

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER IFFERENTIAL LOCK NPUT NTERFACE The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both signals must meet the V V input requirements. Figures 2A to ...

Page 10

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER LVDS D T RIVER ERMINATION A general LVDS interface is shown in Figure 100 differential transmission line environment, LVDS drivers require a matched load termination of 100 3.3V IDT ™ ...

Page 11

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER This section provides information on power dissipation and junction temperature for the ICS85411. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS85411 is the sum ...

Page 12

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER ABLE VS IR LOW ABLE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. ...

Page 13

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER ABLE RDERING NFORMATION ...

Page 14

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER ...

Page 15

ICS85411 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT © 2009 Integrated Device Technology, Inc. All rights reserved. Product specifications subject ...

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