MPC9449FA IDT, Integrated Device Technology Inc, MPC9449FA Datasheet - Page 5

• Manufacturer Part Number: MPC9449FA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Dividerr

Specifications of MPC9449FA

• Number Of Clock Inputs: 3
• Output Frequency: 200MHz
• Output Logic Level: LVCMOS
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: LQFP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: LVCMOS/LVPECL
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Not Compliant

IDT™ / ICS™ 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER
MPC9449
3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER
Table 7. DC Characteristics (V
Table 8. AC Characteristics (V
1. V
2. The MPC9449 is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated
3. Inputs have pull-down or pull-up resistors affecting the input current.
1. AC characteristics apply for parallel output termination of 50 Ω to V
2. V
3. An input rise/fall time greater than that specified may be used, but AC characteristics are not guaranteed under such a condition.
Symbol
Symbol
V
V
t
t
t
t
t
t
PLH, HL
PLZ, HZ
PZL, LZ
JIT(CC)
t
Z
and the input swing lies within the V
transmission line to a termination voltage of V
P, REF
t
and the input swing lies within the V
CMR
CMR
sk(PP)
SK(P)
V
V
V
V
f
tr, tf
sk(O)
t
V
I
V
max
f
OUT
I
r
CC
CMR
CMR
ref
OH
IN
, t
PP
OL
PP
IH
IL
f
(1)
(2)
(DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the V
(AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the V
Input High Voltage
Input Low Voltage
Peak-to-Peak Input Voltage
Common Mode Range
Output High Voltage
Output Low Voltage
Output Impedance
Input Current
Maximum Quiescent Supply Current
Peak-to-Peak Input Voltage
Common Mode Range
Output Frequency
Input Frequency
Reference Input Pulse Width
CCLK Input Rise/Fall Time
Output-to-Output Skew
Same Frequency
Different Frequencies
Device-to-Device Skew
Output Pulse Skew
Propagation Delay
Output Disable Time
Output Enable Time
Output Rise/Fall Time
Cycle-to-Cycle Jitter
(3)
Characteristics
Characteristics
CC
CC
(3)
CCLK0 or CCLK1 to any Q
= 2.5 V ± 5%, T
= 2.5 V ± 5%, T
PP
PP
(DC) specification.
(AC) specification. Violation of V
PCLK to any Q
TT
PCLK, PCLK
PCLK, PCLK
PCLK, PCLK
PCLK, PCLK
OE to any Q
OE to any Q
.
Qa outputs
Qb outputs
Qd outputs
Qc outputs
All outputs
All outputs
RMS (1 σ)
A
A
= –40
= -40
°
°
C to 85°C)
C to 85°C)
5
TT
–0.3
Min
250
Min
400
1.7
1.8
1.0
1.2
1.5
1.0
1.0
0.1
0
0
.
CMR
(1)
or V
PP
17–20
TBD
Typ
Typ
5.0
3.5
3.5
impacts propagation delay.
V
V
V
CC
CC
CC
±200
1000
Max
Max
200
200
100
200
300
350
1.0
7.0
7.0
1.0
0.7
0.6
50
50
50
11
11
10
+ 0.3
–0.6
–0.6
MPC9449 REV 5 MARCH 14, 2007
MHz
MHz
Unit
Unit
mV
mA
mV
µA
ns
ns
ps
ps
ps
ps
ps
ps
ns
ps
ns
ns
ns
ns
ns
ps
V
V
Ω
V
V
V
V
LVPECL
LVPECL
0.7 to 1.7 V
DC
0.6 to 1.8 V
LVCMOS
LVCMOS
LVPECL
LVPECL
I
I
V
All V
OH
OL
IN
REF
= 15 mA
= V
= –15 mA
CC
Condition
Condition
CC
= 50%
Pins
CMR
CMR
or GND
range
(2)
range