ICS85214AGI IDT, Integrated Device Technology Inc, ICS85214AGI Datasheet - Page 10

ICS85214AGI

Manufacturer Part Number
ICS85214AGI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS85214AGI

Number Of Clock Inputs
2
Output Frequency
700MHz
Output Logic Level
HSTL
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS85214AGILF
Manufacturer:
Freescale
Quantity:
89
This section provides information on power dissipation and junction temperature for the ICS85214I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS85214I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for the devices is 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
T
85214AGI
ABLE
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
6. T
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 5 * 32.8mW = 164mW
Total Power
The equation for Tj is as follows: Tj =
Tj = Junction Temperature
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.391W * 66.6°C/W = 111°C. This is well below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
HERMAL
R
MAX
ESISTANCE
_MAX
MAX
= V
(3.465V, with all outputs switching) = 227.2mW + 164mW = 391.2mW
= 32.8mW/Loaded Output pair
DD_MAX
* I
JA
DD_MAX
F
OR
JA
P
DD
= 3.465V * 80mA = 227.2mW
by Velocity (Linear Feet per Minute)
20-
= 3.3V + 5% = 3.465V, which gives worst case results.
OWER
PIN
JA
* Pd_total + T
TSSOP, F
C
www.idt.com
ONSIDERATIONS
ORCED
A
10
114.5°C/W
73.2°C/W
C
D
0
ONVECTION
IFFERENTIAL
98.0°C/W
66.6°C/W
200
-
TO
-HSTL F
JA
must be used. Assuming a
L
OW
88.0°C/W
63.5°C/W
ICS85214I
500
ANOUT
S
KEW
REV. B JULY 25, 2010
, 1-
B
UFFER
TO
-5

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