IDT5T93GL061PFI IDT, Integrated Device Technology Inc, IDT5T93GL061PFI Datasheet

IDT5T93GL061PFI

Manufacturer Part Number
IDT5T93GL061PFI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of IDT5T93GL061PFI

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
450MHz
Output Logic Level
LVDS
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (typ)
2.5V
Operating Supply Voltage (max)
2.7V
Package Type
TQFP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Quiescent Current
240mA
Lead Free Status / RoHS Status
Not Compliant
© 2007 Integrated Device Technology, Inc.
FEATURES:
• Guaranteed Low Skew < 50ps (max)
• Very low duty cycle distortion < 100ps (max)
• High speed propagation delay < 2.2ns (max)
• Up to 450MHz operation
• Selectable inputs
• Hot insertable and over-voltage tolerant inputs
• 3.3V / 2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V),
• Selectable differential inputs to six LVDS outputs
• Power-down mode
• 2.5V V
• Available in TQFP package
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
APPLICATIONS:
• Clock distribution
IDT5T93GL061
2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II
CML, or LVDS input interface
DD
FSEL
SEL
PD
GL
A1
A1
A2
A2
G
2.5V LVDS 1:6 GLITCHLESS
CLOCK BUFFER
TERABUFFER™ II
0
1
1
DESCRIPTION:
differential input to six LVDS outputs . The fanout from a differential input to six
LVDS outputs reduces loading on the preceding driver and provides an efficient
clock distribution network. The IDT5T93GL061 can act as a translator from a
differential HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS
input to LVDS outputs. A single-ended 3.3V / 2.5V LVTTL input can also be
used to translate to LVDS outputs. The redundant input capability allows for a
glitchless change-over from a primary clock source to a secondary clock source
up to 450MHz. Selectable inputs are controlled by SEL. During the switchover,
the output will disable low for up to three clock cycles of the previously-selected
input clock. The outputs will remain low for up to three clock cycles of the newly-
selected clock, after which the outputs will start from the newly-selected input.
A FSEL pin has been implemented to control the switchover in cases where a
clock source is absent or is driven to DC levels below the minimum specifications.
When disabled, the outputs will drive to the value selected by the GL pin. Multiple
power and grounds reduce noise.
The IDT5T93GL061 2.5V differential clock buffer is a user-selectable
The IDT5T93GL061 outputs can be asynchronously enabled/disabled.
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INDUSTRIAL TEMPERATURE RANGE
IDT5T93GL061
JANUARY 2007
Q1
Q1
Q2
Q2
Q3
Q3
Q4
Q4
Q5
Q5
Q6
Q6
DSC 6740/7

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IDT5T93GL061PFI Summary of contents

Page 1

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II FEATURES: • Guaranteed Low Skew < 50ps (max) • Very low duty cycle distortion < 100ps (max) • High speed propagation delay < 2.2ns (max) • 450MHz operation • ...

Page 2

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II PIN CONFIGURATION GND GND ...

Page 3

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II ABSOLUTE MAXIMUM RATINGS Symbol Description V Power Supply Voltage DD V Input Voltage I V Output Voltage ( Storage Temperature STG T Junction Temperature J NOTES: 1. Stresses greater ...

Page 4

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II DC ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING RANGE FOR LVTTL (1) Symbol Parameter Input Characteristics I Input HIGH Current IH I Input LOW Current IL V Clamp Diode Voltage ...

Page 5

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II DIFFERENTIAL INPUT AC TEST CONDITIONS FOR HSTL Symbol Parameter V Input Signal Swing (1) DIF V Differential Input Signal Crossing Point X D Duty Cycle H V Input Timing Measurement Reference ...

Page 6

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II DIFFERENTIAL INPUT AC TEST CONDITIONS FOR LVDS Symbol Parameter V Input Signal Swing (1) DIF V Differential Input Signal Crossing Point X D Duty Cycle H V Input Timing Measurement Reference ...

Page 7

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Symbol Parameter Skew Parameters Same Device Output Pin-to-Pin Skew Pulse Skew ( ...

Page 8

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II DIFFERENTIAL AC TIMING WAVEFORMS [1:2] [1: NOTES: 1. Pulse skew is calculated using the following expression ...

Page 9

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER [1:2] [1: PLH Differential Gate Disable/Enable Showing Runt Pulse Generation NOTE shown possible to generate runt pulses on ...

Page 10

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II NOTES: 1. When the differential on the selected clock goes below the minimum DC differential, the outputs clock goes to an unknown state. When this happens, the SEL pin should be ...

Page 11

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER FSEL SEL Selection of Input While Protecting Against When Opposite Clock Dies NOTES the user holds ...

Page 12

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II TEST CIRCUITS AND CONDITIONS Pulse Generator DIFFERENTIAL INPUT TEST CONDITIONS ~50Ω Transmission Line ~50Ω Transmission Line Test Circuit for Differential Input Symbol V = 2.5V ± 0.2V ...

Page 13

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II Pulse Generator Pulse Generator Test Circuit for Propagation, Skew, and Gate Enable/Disable Timing NOTES: 1. Specifications only apply to "Normal Operations" test condition. The T 2. The scope inputs are assumed ...

Page 14

IDT5T93GL061 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II ORDERING INFORMATION XX IDT XXXXX Package Process Device Type CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 X I -40°C to +85°C (Industrial) Thin Quad Flat Pack PF ...

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