MC100ES6221TB IDT, Integrated Device Technology Inc, MC100ES6221TB Datasheet - Page 4

• Manufacturer Part Number: MC100ES6221TB
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of MC100ES6221TB

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 2000MHz
• Output Logic Level: ECL/PECL
• Operating Supply Voltage (min): -2.375/2.375V
• Operating Supply Voltage (typ): -2.5/-3.3/2.5/3.3V
• Operating Supply Voltage (max): -3.465/3.465V
• Package Type: TQFP EP
• Operating Temp Range: 0C to 110C
• Operating Temperature Classification: Commercial
• Signal Type: ECL/HSTL/PECL
• Mounting: Surface Mount
• Pin Count: 52
• Quiescent Current: 160mA
• Lead Free Status / RoHS Status: Not Compliant

IDT™ Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MC100ES6221
Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer
Table 5. PECL DC Characteristics (V
MC100ES6221
4
10. Using V
Clock Input Pair CLK0, CLK0
Clock Input Pair CLK1, CLK1
Clock Inputs (PECL single ended signals)
PECL Clock Outputs (Q0–19, Q0–19)
Supply current and V
1. The input pairs CLK0, CLK1 are compatible to differential signaling standards. CLK0 is compatible to LVPECL signals and CLK1 meets both
2. V
3. V
4. Clock inputs driven by differential HSTL compatible signals. Only applicable to CLK1, CLK1.
5. V
6. V
7. Inputs have internal pullup/pulldown resistors which affect the input current.
8. Equivalent to a termination of 50 Ω to V
9. I
Symbol
V
I
V
V
V
V
EE
V
V
V
V
V
CMR
V
HSTL differential signal specifications. The difference between CLK0 and CLK1 is the differential input threshold voltage (V
range and the input swing lies within the V
range and the input swing lies within the V
differential input signals should be used with the MC100ES6221.
I
I
I
CC
IN
DIF
IN
IN
OH
PP
OL
BB
IH
IH
X
IL
IL
PP
CMR
DIF
X
(9)
(DC) is the crosspoint of the differential HSTL input signal. Functional operation is obtained when the crosspoint is within the V
calculation:
(DC) is the minimum differential input voltage swing required to maintain device functionality.
(DC) is the minimum differential HSTL input voltage swing required for device functionality.
(DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the V
Differential Input Voltage
Differential Cross Point Voltage
Input Current
Differential Input Voltage
Differential Cross Point Voltage
Input High Voltage
Input Low Voltage
Input Current
Input Voltage High
Input Voltage Low
Input Current
Output High Voltage
Output Low Voltage
Maximum Quiescent Supply Current without
Output Termination Current
Output Reference Voltage (f
BB
to bias unused single-ended inputs is recommended only up to a clock reference frequency of 1 GHz. Above 1 GHz, only
BB
I
I
CC
CC
(1)
(7)
= (number of differential output used) x (I
= (number of differential output used) x (V
Characteristics
(1)
(4)
(HSTL differential signals)
(PECL differential signals)
(2)
(5)
ref
< 1.0 GHz)
CC
(3)
(6)
TT.
PP
PP
= 2.5 V ± 5% or V
(DC) specification.
(DC) specification.
(10)
V
V
V
V
V
CC
CC
V
V
CC
CC
CC
X
X
CC
Min
OH
0.1
1.0
0.2
– 1.165
– 1.810
OH
+ 0.1
– 0.7
– 1.42
0
– 1.1
– 1.9
= 3.3 V ± 5%, V
+ I
4
– V
OL
TT
) + I
) ÷ R
V
V
0.68 - 0.9
CC
CC
EE
Typ
load
– 1.005
– 1.705
84
+ (V
EE
OL
= GND, T
V
V
V
– V
V
V
V
V
CC
CC
V
V
CC
CC
CC
CC
CC
X
±100
X
±100
±100
Max
160
1.3
1.4
TT
– 0.880
– 1.475
+ 0.7
– 0.1
– 1.20
– 0.3
– 0.7
– 0.7
– 1.4
) ÷ R
J
= 0°C to + 110°C)
load
Advanced Clock Drivers Devices
Unit
+ I
mA
µA
µA
µA
V
V
V
V
V
V
V
V
V
V
V
EE
.
Freescale Semiconductor
Differential operation
Differential operation
V
V
V
I
I
V
I
OH
OL
BB
IN
IN
IN
EE
= –5 mA
= 0.4 mA
= V
= V
= V
= –30 mA
pins
IL
X
IL
Condition
± 0.2 V
or V
or V
CMR
(8)
IN
IN
(8)
CMR
).
= V
= V
X
IH
IH
(DC)
MC100ES6221
(DC)
NETCOM