ISL3685IR96 Intersil, ISL3685IR96 Datasheet - Page 7

• Manufacturer Part Number: ISL3685IR96
• Manufacturer: Intersil

Specifications of ISL3685IR96

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Reference Frequency Counter/Divider
LO Frequency Counters/Dividers
Operational Modes
R(0-14)
B(0-11)
A(0-6)
M(13)
M(14)
M(15)
M(0)
M(2)
M(3)
M(4)
M(5)
M(6)
M(7)
M(8)
BIT
BIT
BIT
Least significant bit R(0) to most significant bit R(14) of the divide by R counter. The Reference signal frequency is divided down
by this counter and is compared with a divided LO by a phase detector.
Least significant bit A(0) to most significant bit A(6) of a 7-bit Swallow counter and LSB B(0) to MSB B(10) of the 11-bit divider.
The LO frequency is divided down by [P
compared by a phase detector with the divided Reference signal.
(PLL_PE), Phase Lock Loop Power Enable. 1 = Enable, 0 = Power Down. Serial port always on.
Prescaler Select. 0 = 32/33, 1 = 64/65.
Charge Pump Current Setting
Charge Pump Sign
LD Pin Multiplex Operation
Charge Pump Operation/Test
7
M(13)
M(15)
M(6)
*
0
0
0
0
1
1
1
0
0
1
1
B+A], where P is the Prescaler divider set by bit M(2). This divided signal frequency is
ISL3685
M(14)
DESCRIPTION
DESCRIPTION
DESCRIPTION
M(4)
M(5)
M(8)
0
0
1
1
0
1
0
1
0
1
1
0
1
0
1
Source if LO/ [P
Source if LO/ [P
Normal Operation
Charge Pump Constant Current Source
Charge Pump Constant Current Sink
High Impedance State
M(3)
M(7)
X
X
X
0
1
0
1
0
1
*
*
B+A] < Ref/R
B+A] > Ref/R
OPERATION/TEST
0.25mA
0.50mA
0.75mA
1.00mA
Lock Detect Operation
Short to GND
Serial Register Read Back
Ref. Divided by R Waveform
LO Divided by [P
Waveform
OUTPUT SINK/SOURCE
OUTPUT AT PIN LD
*
B+A]