85310AYI-01LF Integrated Device Technology (Idt), 85310AYI-01LF Datasheet - Page 4

• Manufacturer Part Number: 85310AYI-01LF
• Description: Clock Driver 2-IN ECL/LVPECL 32-Pin LQFP Tray
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 85310AYI-01LF

• Package: 32LQFP
• Configuration: 1 x 2:1
• Input Signal Type: HCSL/LVDS/LVHSTL/LVPECL/SSTL
• Maximum Output Frequency: 700 MHz
• Operating Supply Voltage: -2.5|-3.3|3.3 V

ICS5310I-01 Data Sheet
Table 3C. DC Characteristics, V
NOTE 1: V
NOTE 2: Common mode voltage is defined as V
Table 3D. LVPECL DC Characteristics, V
NOTE 1: Outputs terminated with 50
AC Electrical Characteristics
Table 4. AC Characteristics, V
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters measured at 500MHz, unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 3: This parameter is defined according with JEDEC Standard 65.
NOTE 4: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential
cross points.
ICS85310AYI-01 REVISION I JANUARY 25, 2010
Symbol
I
I
V
V
Symbol
V
V
V
Symbol
f
tjit
t
tsk(pp)
tsk(o)
t
odc
IH
IL
MAX
PD
R
OH
OL
PP
CMR
swing
/ t
F
IL
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Parameter
Input High Current
Input Low Current
Peak-to-Peak Voltage; NOTE 1
Common Mode Range; NOTE 1, 2
should not be less than -0.3V.
Parameter
Output Frequency
Additive Phase Jitter, RMS; refer
to Additive Phase Jitter section
Propagation Delay; NOTE 1
Part-to-Part Skew; NOTE 2, 3
Output Skew; NOTE 3, 4
Output Rise/Fall Time
Output Duty Cycle
CC
CLK[0:1],
nCLK[0:1]
CLK[0:1]
nCLK[0:1]
Ω
CC
= V
to V
= V
CCO
CCO
CCO
= 2.375V to 3.8V; V
CC
– 2V.
IH
= 2.375V to 3.8V; V
.
= V
CCO
V
V
CC
CC
V
V
Test Conditions
CC
CC
= 2.375V to 3.8V; V
= V
= V
Test Conditions
Test Conditions
20% to 80%
= 3.8V or 2.625V,
= 3.8V or 2.625V,
IN
IN
V
V
= 3.8V or 2.625V
= 3.8V or 2.625V
IN
IN
LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER
= 0V
= 0V
EE
4
EE
= 0V, T
= 0V, T
A
EE
A
= -40°C to 85°C
= -40°C to 85°C
= 0V, T
V
V
Minimum
Minimum
CCO
CCO
Minimum
V
A
200
EE
0.6
47
-150
0.15
= -40°C to 85°C
-5
– 1.4
– 2.0
+ 0.5
Typical
<0.13
Typical
140
©2010 Integrated Device Technology, Inc.
Typical
30
2
Maximum
V
V
V
Maximum
Maximum
CCO
CCO
CC
700
340
700
2.5
55
53
1.0
150
1.3
– 0.85
5
– 0.9
– 1.7
Units
MHz
Units
Units
ps
ps
ns
ps
ps
%
µA
µA
µA
µA
V
V
V
V
V