ICS8533AGI-31 IDT, Integrated Device Technology Inc, ICS8533AGI-31 Datasheet - Page 3

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ICS8533AGI-31

Manufacturer Part Number
ICS8533AGI-31
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS8533AGI-31

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
650MHz
Output Logic Level
LVPECL
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Supplier Unconfirmed
Function Tables
Table 3A. Control Input Function Table
After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock or crystal oscillator edge as
shown in Figure 1. In the active mode, the state of the outputs are a function of the CLK, nCLK and XTAL inputs as described in Table 3B.
Figure 1. CLK_EN Timing Diagram
Table 3B. Clock Input Function Table
IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER
ICS8533I-31
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/DIFFERENTIAL-TO- 3.3V LVPECL FANOUT BUFFER
CLK_EN
Biased; NOTE 1
Biased; NOTE 1
nQ0:nQ3
Q0:Q3
CLK_EN
nCLK
CLK
CLK
0
0
1
1
0
1
0
1
Inputs
Biased; NOTE 1
Biased; NOTE 1
CLK_SEL
nCLK
0
1
0
1
Inputs
1
0
0
1
Disabled
XTAL_IN, XTAL_OUT
XTAL_IN, XTAL_OUT
Selected Source
Q0:Q3
HIGH
HIGH
HIGH
LOW
LOW
LOW
CLK, nCLK
CLK, nCLK
Outputs
nQ0:nQ3
HIGH
HIGH
HIGH
3
LOW
LOW
LOW
Disabled; Low
Disabled; Low
Enabled
Enabled
Q0:Q3
Single-ended to Differential
Single-ended to Differential
Single-ended to Differential
Single-ended to Differential
Differential to Differential
Differential to Differential
Input to Output Mode
Outputs
Enabled
ICS8533AGI-31 REV. A DECEMBER 13, 2007
Disabled; High
Disabled; High
nQ0:nQ3
Enabled
Enabled
Non inverting
Non inverting
Non inverting
Non inverting
Inverting
Inverting
Polarity
PRELIMINARY

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