ICS889874AK IDT, Integrated Device Technology Inc, ICS889874AK Datasheet - Page 10

• Manufacturer Part Number: ICS889874AK
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Dividerr

Specifications of ICS889874AK

• Number Of Clock Inputs: 1
• Mode Of Operation: Differential
• Output Frequency: 2000MHz
• Output Logic Level: ECL/LVPECL
• Operating Supply Voltage (min): -2.375/2.375V
• Operating Supply Voltage (typ): -2.5/-3.3/3.3V
• Package Type: VFQFN
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/LVDS/LVPECL
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Not Compliant

T
The clock layout topology shown below is a typical termi-
nation for LVPECL outputs. The two different layouts men-
tioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
designed to drive 50Ω transmission lines. Matched imped-
889874AK
R
I
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
NPUTS
ERMINATION FOR
ECOMMENDATIONS FOR
RTT =
:
((V
F
FOUT
IGURE
OH
ONTROL
+ V
Integrated
Circuit
Systems, Inc.
OL
6A. LVPECL O
) / (V
resistor can be used.
P
1
INS
3.3V LVPECL O
CC
:
Z
Z
– 2)) – 2
o
o
= 50Ω
= 50Ω
U
NUSED
Z
o
50Ω
UTPUT
I
NPUT AND
T
RTT
ERMINATION
UTPUTS
50Ω
www.icst.com/products/hiperclocks.html
PRELIMINARY
V
CC
FIN
- 2V
O
UTPUT
P
10
INS
ance techniques should be used to maximize operating
frequency and minimize signal distortion. Figures 6A and
6B show two different layouts which are recommended only
as guidelines. Other suitable clock layouts may exist and it
would be recommended that the board designers simulate
to guarantee compatibility across all printed circuit and
clock component process variations.
D
O
LVPECL O
All unused LVPECL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
IFFERENTIAL
UTPUTS
FOUT
F
IGURE
:
UTPUT
6B. LVPECL O
-
TO
Z
Z
o
o
-LVPECL B
= 50Ω
= 50Ω
125Ω
84Ω
UTPUT
3.3V
ICS889874
T
125Ω
84Ω
UFFER
ERMINATION
REV. A MARCH 20, 2006
FIN
/D
IVIDER
1:2