ICS889874AK IDT, Integrated Device Technology Inc, ICS889874AK Datasheet - Page 7

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ICS889874AK

Manufacturer Part Number
ICS889874AK
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Dividerr
Datasheet

Specifications of ICS889874AK

Number Of Clock Inputs
1
Mode Of Operation
Differential
Output Frequency
2000MHz
Output Logic Level
ECL/LVPECL
Operating Supply Voltage (min)
-2.375/2.375V
Operating Supply Voltage (typ)
-2.5/-3.3/3.3V
Package Type
VFQFN
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Signal Type
CML/LVDS/LVPECL
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Not Compliant
3.3V LVPECL I
The IN /nIN with built-in 50Ω terminations accepts LVDS,
LVPECL, LVHSTL, CML, SSTL and other differential signals.
Both V
ments. Figures 2A to 2E show interface examples for the
HiPerClockS IN/nIN input with built-in 50Ω terminations driven
F
889874AK
F
F
IGURE
IGURE
IGURE
3.3V
3.3V
3.3V
SWING
2C. H
2A. H
CML- Open Collector
2E. H
SSTL
LVDS
and V
B
WITH
B
B
R1
I
UILT
I
I
UILT
UILT
P
R2
P
P
Integrated
Circuit
Systems, Inc.
ER
ER
ER
OH
O
25
-
-
-
C
IN
C
C
IN
IN
NPUT WITH
Zo = 50 Ohm
Zo = 50 Ohm
25
must meet the V
Zo = 50 Ohm
Zo = 50 Ohm
PEN
LOCK
LOCK
LOCK
50Ω Ω Ω Ω Ω D
50Ω Ω Ω Ω Ω D
50Ω Ω Ω Ω Ω D
Zo = 50 Ohm
Zo = 50 Ohm
C
S IN/nIN I
S IN/nIN I
S IN/nIN I
OLLECTOR
RIVEN BY A
RIVEN BY AN
RIVEN BY AN
B
UILT
NPUT WITH
NPUT WITH
PP
NPUT WITH
and V
-I
A
N
CML D
IN
VT
nIN
IN
VT
nIN
IN
VT
nIN
LVDS D
SSTL D
www.icst.com/products/hiperclocks.html
50Ω Ω Ω Ω Ω T
PPLICATION
3.3V
CMR
3.3V
3.3V
PRELIMINARY
input require-
Receiver
With
Built-In
50 Ohm
Receiver
With
Built-In
50 Ohm
RIVER
Receiver
With
Built-In
50 Ohm
ERMINATIONS
RIVER
RIVER
7
I
by the most common driver types. The input interfaces
suggested here are examples only. If the driver is from an-
other vendor, use their termination recommendation. Please
consult with the vendor of the driver component to confirm
the driver termination requirements.
F
F
D
NFORMATION
I
IGURE
IGURE
NTERFACE
IFFERENTIAL
3.3V
3.3V
2B. H
2D. H
CML- Built-in 50 Ohm Pull-Up
LVPECL
B
B
WITH
I
UILT
I
UILT
P
P
ER
ER
B
-
-
-
C
IN
C
IN
Zo = 50 Ohm
Zo = 50 Ohm
TO
Zo = 50 Ohm
Zo = 50 Ohm
UILT
LOCK
LOCK
50Ω Ω Ω Ω Ω D
50Ω Ω Ω Ω Ω D
-LVPECL B
-I
N
S IN/nIN I
S IN/nIN I
50Ω Ω Ω Ω Ω P
RIVEN BY AN
RIVEN BY A
ULLUP
NPUT WITH
NPUT WITH
ICS889874
R1
50
UFFER
CML D
IN
VT
nIN
LVPECL D
IN
VT
nIN
3.3V
3.3V
REV. A MARCH 20, 2006
Receiver
With
Built-In
50 Ohm
Receiver
With
Built-In
50 Ohm
RIVER
/D
IVIDER
RIVER
1:2

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