ICS853054AGT IDT, Integrated Device Technology Inc, ICS853054AGT Datasheet - Page 11

• Manufacturer Part Number: ICS853054AGT
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Multiplexerr

Specifications of ICS853054AGT

• Number Of Clock Inputs: 4
• Mode Of Operation: Differential
• Output Frequency: 3200MHz
• Output Logic Level: ECL/LVPECL
• Operating Supply Voltage (min): -2.375/2.375V
• Operating Supply Voltage (typ): -2.5/-3.3/3.3V
• Operating Supply Voltage (max): -3.465/3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/LVDS/LVPECL/SSTL
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Not Compliant

IDT™ / ICS™ 4:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER
ICS853054
4:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER
This section provides information on power dissipation and junction temperature for the ICS853054.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS853054 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
moderate air flow of 200 meters per second and a multi-layer board, the appropriate value is 81.8°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
T
853054AG
ABLE
6. T
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
Power (core)
Power (outputs)
Total Power
The equation for Tj is as follows: Tj =
Tj = Junction Temperature
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.239W * 81.8°C/W = 104.6°C. This is well below the limit of 125°C.
JA
A
= Ambient Temperature
= junction-to-Ambient Thermal Resistance
HERMAL
Integrated
Circuit
Systems, Inc.
R
MAX
ESISTANCE
_MAX
MAX
= V
= 27.83mW/Loaded Output pair
(3.465V, with all outputs switching) = 211.37mW + 27.83mW = 239.2mW
CC_MAX
* I
JA
EE_MAX
FOR
P
CC
16-P
JA
=
www.icst.com/products/hiperclocks.html
= 3.3V ± 5% = 3.465V, which gives worst case results.
3.465V
OWER
by Velocity (Meters per Second)
JA
IN
* Pd_total + T
TSSOP F
* 61mA = 211.37mW
C
ONSIDERATIONS
ORCED
A
11
11
137.1°C/W
89.0°C/W
C
ONVECTION
0
4:1, D
TM
LVPECL/ECL C
devices is 125°C.
IFFERENTIAL
118.2°C/W
81.8°C/W
200
JA
must be used. Assuming a
-
LOCK
TO
106.8°C/W
78.1°C/W
-3.3V
500
M
REV. A JANUARY 5, 2006
ULTIPLEXER
OR
2.5V
ICS853054
TSD