ICS85357AGI-01T IDT, Integrated Device Technology Inc, ICS85357AGI-01T Datasheet
ICS85357AGI-01T
Specifications of ICS85357AGI-01T
Related parts for ICS85357AGI-01T
ICS85357AGI-01T Summary of contents
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... CLK2 10 nCLK2 CLK3 11 nCLK3 SEL1 SEL0 ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 Features • High speed differential multiplexer. The device can be configured as either a 4:1 or 2:1 multiplexer • One differential 3.3V LVPECL output • Four selectable CLK, nCLK inputs • CLK, nCLK pair can accept the following differential ...
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... Input Pulldown Resistor PULLDOWN Function Table Table 3. Control Input Function Table Inputs SEL1 SEL0 ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 Type Description Positive supply pins. Input Pulldown Non-inverting differential clock input. Input Pullup Inverting differential clock input. Input Pulldown Non-inverting differential clock input. Input Pullup Inverting differential clock input ...
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... Peak to Peak Voltage; NOTE 1 PP Common Mode Input Voltage; V CMR NOTE 1, 2 NOTE 1: V should not be less than -0.3V. IL NOTE 2: Common Mode input voltage is defined as V ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 4:1 OR 2:1, DIFFERENTIAL-TO-3.3V LVPECL CLOCK MULTIPLEXER Rating 4.6V -0. 0.5V CC 50mA 100mA 73.2°C/W (0 lfpm) -65° ...
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... NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points. NOTE 3: This parameter is defined in accordance with JEDEC Standard 65. ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 = 3.3V ± 5 0V, T ...
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... Propagation Delay nQ0 PERIOD t PW odc = t PERIOD Output Duty Cycle/Pulse Width/Period ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 SCOPE Qx nQx Differential Input Level nQ0 nQ0 Part-to-Part Skew nQ0 Q0 x 100% Output Rise/Fall Time 5 4:1 OR 2:1, DIFFERENTIAL-TO-3.3V LVPECL CLOCK MULTIPLEXER V CC nCLK[0:3] V Cross Points ...
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... This can be done in one of two ways. First, R3 and R4 in parallel should equal the transmission Figure 1. Recommended Schematic for Wiring a Differential Input to Accept Single-ended Levels ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 line impedance. For most 50Ω applications, R3 and R4 can be 100Ω ...
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... R3 and R4 can be 0Ω Figure 2E. CLK/nCLK Input Driven by a 3.3V HCSL Driver ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 Please consult with the vendor of the driver component to confirm the and V must meet the V driver termination requirements. For example, in Figure 2A, the input ...
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... Figure 3A. 3.3V LVPECL Output Termination ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 3A and 3B show two different layouts which are recommended only as guidelines. Other suitable clock layouts may ...
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... Linear Feet per Minute Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 = 3. 3.465V, which gives worst case results ...
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... Pd_H = [(V – (V – 2V))/R OH_MAX CC_MAX [(2V – 0.9V)/50Ω] * 0.9V = 19.8mW Pd_L = [(V – (V – 2V))/R OL_MAX CC_MAX [(2V – 1.7V)/50Ω] * 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 V OUT RL 50Ω – 0.9V CC_MAX = V – ...
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... NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. Transistor Count The transistor count for ICS85357I-01 is: 400 Package Outline and Package Dimensions Package Outline - G Suffix for 20 Lead TSSOP ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 4:1 OR 2:1, DIFFERENTIAL-TO-3.3V LVPECL CLOCK MULTIPLEXER θ by Velocity JA ...
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... Any other applications, such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 4:1 OR 2:1, DIFFERENTIAL-TO-3.3V LVPECL CLOCK MULTIPLEXER Package ...
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... AC Characteristics Table - added thermal note. 6 Updated Wiring the Differential Input to Accept Single-ended Levels Updated Differential Clock Input Interface Ordering Information Table - added LF marking. Converted datasheet format. ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010 4:1 OR 2:1, DIFFERENTIAL-TO-3.3V LVPECL CLOCK MULTIPLEXER 13 ©2010 Integrated Device Technology, Inc. Date 7/29/10 9/1/10 ...
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ICS85357I-01 Data Sheet We’ve Got Your Timing Solution 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to ...