ICS85357AGI-01T IDT, Integrated Device Technology Inc, ICS85357AGI-01T Datasheet - Page 9

ICS85357AGI-01T

Manufacturer Part Number
ICS85357AGI-01T
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Multiplexerr
Datasheet

Specifications of ICS85357AGI-01T

Number Of Clock Inputs
4/2
Mode Of Operation
Differential
Output Frequency
750MHz
Output Logic Level
ECL/LVPECL
Operating Supply Voltage (min)
-3.135/3.135V
Operating Supply Voltage (typ)
-3.3/3.3V
Operating Supply Voltage (max)
-3.465/3.465V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Not Compliant
ICS85357I-01 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS85357I-01.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS85357I-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
ICS85357AGI-01 REVISION A SEPTEMBER 1, 2010
Linear Feet per Minute
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
Power Dissipation.
Power (core)
Power (outputs)
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.151W * 66.6°C/W = 95.05°C. This is below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
(3.465V, with all outputs switching) = 121.3mW + 30mW = 151.3mW
MAX
MAX
= V
= 30mW/Loaded Output pair
CC_MAX
θ
JA
* I
for 20 Lead TSSOP, Forced Convection
EE_MAX
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 35mA = 121.3mW
* Pd_total + T
θ
JA
A
114.5°C/W
73.2°C/W
by Velocity
0
9
4:1 OR 2:1, DIFFERENTIAL-TO-3.3V LVPECL CLOCK MULTIPLEXER
98.0°C/W
66.6°C/W
200
JA
must be used. Assuming a moderate air
©2010 Integrated Device Technology, Inc.
88.0°C/W
63.5°C/W
500

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