ICS85357AG-11T IDT, Integrated Device Technology Inc, ICS85357AG-11T Datasheet - Page 6

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ICS85357AG-11T

Manufacturer Part Number
ICS85357AG-11T
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Multiplexerr
Datasheet

Specifications of ICS85357AG-11T

Number Of Clock Inputs
4
Mode Of Operation
Single-Ended
Output Logic Level
ECL/LVPECL
Operating Supply Voltage (min)
-3.135/3.135V
Operating Supply Voltage (typ)
-3.3/3.3V
Operating Supply Voltage (max)
-3.465/3.465V
Package Type
TSSOP
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Not Compliant
T
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that gen-
erate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must
be used for functionality. These outputs are designed to drive
85357AG-11
RTT =
ERMINATION FOR
((V
F
FOUT
OH
IGURE
+ V
OL
2A. LVPECL O
) / (V
1
LVPECL O
CC
Z
Z
– 2)) – 2
o
o
= 50
= 50
Z
o
50
UTPUT
UTPUTS
T
RTT
ERMINATION
50
V
CC
FIN
- 2V
www.idt.com
6
50 transmission lines. Matched impedance techniques should
be used to maximize operating frequency and minimize signal
distortion. Figures 2A and 2B show two different layouts which
are recommended only as guidelines. Other suitable clock lay-
outs may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
4:1
FOUT
OR
F
IGURE
2:1, C
2B. LVPECL O
LVPECL / ECL M
Z
Z
RYSTAL
o
o
= 50
= 50
125
84
O
ICS85357-11
UTPUT
SCILLATOR
3.3V
125
84
T
ERMINATION
REV. D OCTOBER 4, 2010
ULTIPLEXER
FIN
-
TO
-3.3V

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