ICS8344AY-01T IDT, Integrated Device Technology Inc, ICS8344AY-01T Datasheet - Page 12

• Manufacturer Part Number: ICS8344AY-01T
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of ICS8344AY-01T

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 250MHz
• Output Logic Level: LVCMOS/LVTTL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: LQFP
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Quiescent Current: 95mA
• Lead Free Status / RoHS Status: Not Compliant

F
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
V
examples for the HiPerClockS CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here are
F
IDT
F
IGURE
PP
IGURE
IGURE
IFFERENTIAL
ICS8344-01
LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
™
and V
3.3V
R5,R6 locate near the driver pin.
/ ICS
3.3V
LVPECL
2C. H
2A. H
2E. H
1.8V
™
CMR
LVPECL
LVCMOS/LVTTL FANOUT BUFFER
R5
100 - 200
input requirements. Figures 2A to 2E show interface
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V LVPECL D
IDT H
3.3V LVPECL D
I
I
I
P
P
P
C
ER
ER
ER
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
R6
100 - 200
Zo = 50 Ohm
Zo = 50 Ohm
C
C
I
C
P
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
LOCK
ER
C
I
NPUT
LOCK
S CLK/nCLK I
S CLK/nCLK I
S CLK/
RIVER
S LVHSTL D
RIVER WITH
R1
50
3.3V
R3
125
C1
C2
I
NTERFACE
R1
84
N
CLK I
R2
50
3.3V
R3
125
R4
125
SWING
R1
84
R2
84
CLK
nCLK
and V
R4
125
NPUT
R2
84
NPUT
AC C
NPUT
CLK
nCLK
3.3V
3.3V
RIVER
HiPerClockS
Input
OH
HiPerClockS
Input
D
D
D
OUPLE
CLK
nCLK
must meet the
RIVEN BY
RIVEN BY
RIVEN BY
3.3V
HiPerClockS
Input
12
F
examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in Figure 2A, the input termination applies for IDT
HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver
from another vendor, use their termination recommendation.
F
IGURE
IGURE
3.3V
3.3V
2D. H
2B. H
LVDS_Driv er
LVPECL
3.3V LVDS D
3.3V LVPECL D
I
I
P
P
Zo = 50 Ohm
Zo = 50 Ohm
ER
ER
C
C
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
ICS8344AY-01 REV. C SEPTEMBER 9, 2008
S CLK/nCLK I
S CLK/nCLK I
RIVER
R1
50
RIVER
R3
50
R2
50
R1
100
CLK
nCLK
3.3V
NPUT
NPUT
HiPerClockS
Input
CLK
nCLK
D
D
3.3V
RIVEN BY
RIVEN BY
Receiv er