ICS8534AY-01T IDT, Integrated Device Technology Inc, ICS8534AY-01T Datasheet
ICS8534AY-01T
Specifications of ICS8534AY-01T
Related parts for ICS8534AY-01T
ICS8534AY-01T Summary of contents
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... PCLK nPCLK nQ21 V 1 ICS8534- CCO CLK Q21 15 16 CCO ICS8534-01 64-Lead TQFP E-Pad 10mm x 10mm x 1.0mm package body Y package Top View ICS8534AY-01 REV. A OCTOBER 27, 2008 V 48 CCO Q7 47 nQ7 nQ8 nQ9 42 Q10 41 nQ10 40 Q11 39 nQ11 38 Q12 37 nQ12 36 Q13 35 nQ13 CCO ...
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... Differential clock outputs. LVPECL interface Levels. Differential clock outputs. LVPECL interface Levels. Differential clock outputs. LVPECL interface Levels. Differential clock outputs. LVPECL interface Levels. Differential clock outputs. LVPECL interface Levels. Differential clock outputs. LVPECL interface Levels. Differential clock outputs. LVPECL interface Levels ICS8534AY-01 REV. A OCTOBER 27, 2008 ...
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... CLK 1 1 PCLK nCLK, nPCLK CLK, PCLK OE nQ0:nQ21 Q0:Q21 Figure 1. OE Timing Diagram IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER Test Conditions Outputs nQ0:nQ21 HIGH HIGH nCLK nPCLK Disabled 3 Minimum Typical Maximum Enabled ICS8534AY-01 REV. A OCTOBER 27, 2008 Units pF Ω k Ω k ...
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... Test Conditions Minimum 3.135 3.135 = V = 3.3V ± 5 CCO EE Test Conditions 3.465V 3.465V 0°C to 85°C A Typical Maximum 3.3 3.465 3.3 3.465 230 = 0V 0°C to 85°C A Minimum Typical Maximum 0.3 CC -0.3 0.8 5 -150 ICS8534AY-01 REV. A OCTOBER 27, 2008 Units Units V V µA µA ...
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... -150 0°C to 85° Minimum Typical = -150 – 1.4 CCO V – 2.0 CCO 0.6 ICS8534AY-01 REV. A OCTOBER 27, 2008 Maximum Units 150 µA 5 µA µA µA 1 – 0. Maximum Units 150 µA 5 µA µA µA 1 – 0.9 V CCO V – 1.7 ...
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... IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER = 0V 0°C to 85° Test Conditions ƒ ≤ 500MHz Integration Range: 12kHz - 20MHz 20% to 80% ƒ ≤ 266MHz 266 < ƒ ≤ 500MHz 6 Minimum Typical Maximum 500 2.0 3.0 100 700 0.4 200 700 1 0 ICS8534AY-01 REV. A OCTOBER 27, 2008 Units MHz ...
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... This is illustrated above. The device meets the noise floor of what is shown, but can actually be lower. The phase noise is dependant on the input source and measurement equipment. 7 Additive Phase Jitter, RMS @ 156.25MHz 12kHz to 20MHz = 0.04ps (typical) 1M 10M ICS8534AY-01 REV. A OCTOBER 27, 2008 100M ...
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... Q0:Q21 t PD Propagation Delay IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER V CC SCOPE Qx nCLK, nPCLK CLK, PCLK nQx V EE Differential Input Level nQx Qx nQy Qy Output Skew Clock 20% Outputs Output Rise/Fall Time Cross Points PP CMR tsk(o) 80% 80% 20 ICS8534AY-01 REV. A OCTOBER 27, 2008 ...
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... V = 3.3V, V_REF should be 1.25V and CC R2/R1 = 0.609. IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER PERIOD 100% t PERIOD / Figure 2. Single-Ended Signal Driving Differential Input Single Ended Clock Input V_REF C1 0. ICS8534AY-01 REV. A OCTOBER 27, 2008 CLK, PCLK nCLK. nPCLK ...
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... Driven by a Built-In Pullup CML Driver Zo = 50Ω 50Ω 100 - 200 100 - 200 125 125 a 3.3V LVPECL Driver with AC Couple Zo = 50Ω R1 100 Zo = 50Ω LVDS a 3.3V LVDS Driver ICS8534AY-01 REV. A OCTOBER 27, 2008 3.3V CLK nCLK HiPerClockS 3.3V CLK nCLK HiPerClockS 3.3V CLK nCLK HiPerClockS ...
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... Zo = 50Ω C1 3.3V LVPECL 50Ω 100 - 200 100 - 200 125 a 3.3V LVPECL Driver with AC Couple 50Ω 100 Zo = 50Ω LVDS a 3.3V LVDS Driver ICS8534AY-01 REV. A OCTOBER 27, 2008 3.3V PCLK R1 100 nPCLK HiPerClockS PCLK/nPCLK 3. PCLK nPCLK HiPerClockS PCLK/nPCLK R2 125 3.3V 3. PCLK nPCLK ...
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... FIN FOUT 50Ω RTT Figure 5B. 3.3V LVPECL Output Termination 12 3.3V 125Ω 125Ω 50Ω o FIN Z = 50Ω o 84Ω 84Ω ICS8534AY-01 REV. A OCTOBER 27, 2008 ...
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... These recommendations are to be used as a guideline only. For further information, refer to the Application Note on the Surface Mount Assembly of Amkor’s Thermally/Electrically Enhance Leadfame Base Package, Amkor Technology. SOLDER EXPOSED HEAT SLUG LAND PATTERN (GROUND PAD) THERMAL VIA 13 SOLDER PIN PIN PAD ICS8534AY-01 REV. A OCTOBER 27, 2008 ...
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... IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER = 3.465V, which gives worst case results 3.465V * 230mA = 796.95mW EE_MAX * Pd_total + for 64 Lead TQFP, Forced Convection θ by Velocity JA 0 22.3°C/W 14 must be used. Assuming 0 air flow JA 200 500 17.2°C/W 15.1°C/W ICS8534AY-01 REV. A OCTOBER 27, 2008 ...
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... IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER V OUT RL 50Ω CCO = V – 0.9V CCO_MAX = V – 1.7V CCO_MAX ] * (V – [(2V – CCO_MAX OH_MAX ] * (V – [(2V – CCO_MAX OL_MAX 15 – V ))/ CCO_MAX OH_MAX L CCO_MAX – V ))/ CCO_MAX OL_MAX L CCO_MAX ICS8534AY-01 REV. A OCTOBER 27, 2008 – OH_MAX – OL_MAX ...
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... Linear Feet per Minute Multi-Layer PCB, JEDEC Standard Test Boards Transistor Count The transistor count for ICS8534-01 is: 1474 IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER θ vs. Air Flow JA 0 200 22.3°C/W 17.2°C/W 16 500 15.1°C/W ICS8534AY-01 REV. A OCTOBER 27, 2008 ...
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... D3 & E3 4.5 5.0 e 0.50 Basic L 0.45 0.60 θ 0° ccc Reference Document: JEDEC Publication 95, MS-026 IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER -HD VERSION EXPOSED PAD DOWN Maximum 1.20 0.15 1.05 0.27 0.20 5.5 0.75 7° 0.08 17 ICS8534AY-01 REV. A OCTOBER 27, 2008 ...
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... Shipping Packaging 64 Lead TQFP 64 Lead TQFP 500 Tape & Reel “Lead-Free” 64 Lead TQFP “Lead-Free” 64 Lead TQFP 500 Tape & Reel 18 Temperature Tray 0°C to +85°C 0°C to +85°C Tray 0°C to +85°C 0°C to +85°C ICS8534AY-01 REV. A OCTOBER 27, 2008 ...
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... Updated EPad Thermal Release Path section. Ordering Information Table. Added lead-free part number, marking and note. Updated format throughout the datasheet. Pin Assignment - rotated pin orientation 90° back to original orientation, (datasheet publication dated December 6, 2007). 19 Date 11/19/04 12/06/07 5/09/08 ICS8534AY-01 REV. A OCTOBER 27, 2008 ...
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ICS8534-01 LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER Contact Information: www.IDT.com Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT © 2008 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the ...