ICS85102AGI IDT, Integrated Device Technology Inc, ICS85102AGI Datasheet

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ICS85102AGI

Manufacturer Part Number
ICS85102AGI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS85102AGI

Number Of Clock Inputs
2
Output Frequency
500MHz
Output Logic Level
HCSL
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.63V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Not Compliant

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Part Number
Manufacturer
Quantity
Price
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Manufacturer:
IDT Integrated Device Technolo
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Manufacturer:
IDT
Quantity:
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Part Number:
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LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-
TO-0.7V HCSL FANOUT BUFFER
B
IDT
G
input pair can accept most standard differential input levels.
The clock enable is internally synchronized to eliminate runt
clock pulses on the output during asynchronous assertion/
deassertion of the clock enable pin.
Guaranteed output and par t-to-par t skew characteristics
make the ICS85102I ideal for those applications demanding
well defined performance and repeatability.
CLK_SEL
HiPerClockS™
CLK_EN
IC S
nCLK0
LOCK
ENERAL
CLK0
CLK1
IREF
/ ICS
Pullup
Pulldown
Pullup/Pulldown
Pulldown
Pulldown
0.7V HCSL FANOUT BUFFER
D
The ICS85102I is a low skew, high performance 1-
to-2 Differential-to-HCSL fanout buffer and a mem-
ber of the HiPerClockS™ family of High Perfor-
mance Clock Solutions from IDT. The ICS85102I
has a differential clock input. The CLK0, nCLK0
IAGRAM
D
ESCRIPTION
0
1
D
LE
Q
Q0
nQ0
Q1
nQ1
1
F
Two 0.7V differential HCSL outputs
Selectable differential CLK0, nCLK0 or LVCMOS inputs
CLK0, nCLK0 pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
CLK1 can accept the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 500MHz
Translates any single-ended input signal to 3.3V
HCSL levels with resistor bias on nCLK input
Output skew: 65ps (maximum)
Part-to-part skew: 600ps (maximum)
Propagation delay: 3.2ns (maximum)
Additive phase jitter, RMS: 0.14ps typical @ 250MHz
3.3V operating supply
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
EATURES
P
4.4mm x 5.0mm x 0.925mm body package
IN
A
CLK_SEL
SSIGNMENT
CLK_EN
nCLK0
CLK0
CLK1
IREF
nc
nc
16-Lead TSSOP
ICS85102I
G Package
Top View
1
2
3
4
5
6
7
8
ICS85102AGI REV. A JUNE 10, 2008
16
15
14
13
12
11
10
9
GND
V
Q0
nQ0
Q1
nQ1
V
V
DD
DD
DD
ICS85102I

Related parts for ICS85102AGI

ICS85102AGI Summary of contents

Page 1

... Available in both standard (RoHS 5) and lead-free (RoHS 6) packages SSIGNMENT CLK_EN CLK_SEL CLK0 nCLK0 CLK1 Q0 nc nQ0 nc IREF Q1 nQ1 16-Lead TSSOP 4.4mm x 5.0mm x 0.925mm body package 1 ICS85102I 1 16 GND nQ0 nQ1 ICS85102I G Package Top View ICS85102AGI REV. A JUNE 10, 2008 ...

Page 2

... ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER ABLE IN ESCRIPTIONS ABLE IN HARACTERISTICS IDT ™ / ICS ™ 0.7V HCSL FANOUT BUFFER ICS85102AGI REV. A JUNE 10, 2008 ...

Page 3

... ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER T 3A ABLE ONTROL NPUT UNCTION nCLK0 CLK0 CLK_EN nQ0, nQ1 Q0, Q1 IDT ™ / ICS ™ 0.7V HCSL FANOUT BUFFER ABLE Disabled F 1. CLK_EN T IGURE IMING Enabled D IAGRAM ICS85102AGI REV. A JUNE 10, 2008 ...

Page 4

... Exposure to absolute maximum rating conditions for ex- 100.3°C/W (0 mps) tended periods may affect product reliability 3.3V ± 10 -40° 3.3V ± 10%, T HARACTERISTICS 3.3V ± 10 -40° 85° -40°C 85° 85° ICS85102AGI REV. A JUNE 10, 2008 µ A µ A µ A µ µ A µ A µ ...

Page 5

... ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER 3.3V ± 10%, T ABLE HARACTERISTICS ƒ IDT ™ / ICS ™ 0.7V HCSL FANOUT BUFFER = -40°C 85° ± ± ICS85102AGI REV. A JUNE 10, 2008 ...

Page 6

... FFSET ROM ARRIER REQUENCY device. This is illustrated above. The device meets the noise floor of what is shown, but can actually be lower. The phase noise is dependent on the input source and measurement equipment. 6 Integration Range ICS85102AGI REV. A JUNE 10, 2008 ...

Page 7

... V CMR ART TO ART KEW nCLK0 CLK0 nQ0:nQ3 Q0: ROPAGATION ELAY Rise Edge Rate +150mV 0.0V -150mV IFFERENTIAL EASUREMENT 49.9 2pF 50 33 nQx 49.9 2pF EST IRCUIT tsk(pp IFFERENTIAL NPUTS Fall Edge Rate OINTS FOR ISE ALL IME ICS85102AGI REV. A JUNE 10, 2008 ...

Page 8

... P A EASUREMENT OINTS FOR BSOLUTE IDT ™ / ICS ™ 0.7V HCSL FANOUT BUFFER M I EASUREMENT NFORMATION nQ Negative Duty Cycle (Differential) V CROSS_DELTA UTY YCLE ERIOD EASUREMENT STABLE R INGBACK ROSS OINT WING 8 , CONTINUED = 140mV OINTS FOR ELTA ROSS OINT ICS85102AGI REV. A JUNE 10, 2008 ...

Page 9

... For example, if the input DD clock swing is only 2.5V and V and R2/R1 = 0.609 Single Ended Clock Input V_Bias C1 0. IGURE INGLE NDED IGNAL RIVING UTPUTS = 3.3V, V_BIAS should be 1.25V DD CLK nCLK D I IFFERENTIAL NPUT ICS85102AGI REV. A JUNE 10, 2008 ...

Page 10

... RIVEN BY A RIVER Ohm LVDS_Driv er R1 100 Ohm 3D CLK/nCLK LOCK NPUT D 3.3V LVDS D RIVEN BY A RIVER 2. 120 120 CLK nCLK R1 R2 120 120 3F CLK/nCLK LOCK NPUT D 2.5V SSTL D RIVEN BY A RIVER ICS85102AGI REV. A JUNE 10, 2008 3.3V CLK nCLK Receiv er 3.3V HiPerClockS ...

Page 11

... Figure 4B is the recommended termination for applications which require a point to point connection and contain the driver IDT ™ / ICS ™ 0.7V HCSL FANOUT BUFFER F 4A IGURE ECOMMENDED ERMINATION and receiver on the same PCB. All traces should all be 50 impedance IGURE ECOMMENDED ERMINATION 11 ICS85102AGI REV. A JUNE 10, 2008 ...

Page 12

... OWER ONSIDERATIONS = 3.3V + 10% = 3.63V, which gives worst case results 3.63V * 27mA = 98.01mW TM devices is 125°C. * Pd_total + 16-L TSSOP EAD ORCED ONVECTION by Velocity (Meters per Second 100.3°C/W 12 must be used. Assuming no air JA 1 2.5 96.0°C/W 93.9°C/W ICS85102AGI REV. A JUNE 10, 2008 ...

Page 13

... DD_HIGH L OUT OUT = (3.63V – 17mA * 17mA Total Power Dissipation per output pair = 47.3mW IDT ™ / ICS ™ 0.7V HCSL FANOUT BUFFER OUT = 17mA HCSL D C IGURE RIVER IRCUIT AND load to ground. is HIGH OUT 13 V OUT ERMINATION ICS85102AGI REV. A JUNE 10, 2008 ...

Page 14

... HCSL FANOUT BUFFER R I ELIABILITY NFORMATION 16 L TSSOP EAD by Velocity (Meter per Second 100.3°C/W O ACKAGE UTLINE AND 16 L TSSOP T EAD ABLE S Reference Document: JEDEC Publication 95, MO-153 14 1 2.5 96.0°C/W 93.9°C/W D IMENSIONS ACKAGE IMENSIONS ° 0 ° ICS85102AGI REV. A JUNE 10, 2008 ...

Page 15

... IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT ™ / ICS ™ 0.7V HCSL FANOUT BUFFER " " " " " " ° & ° ° & ° ICS85102AGI REV. A JUNE 10, 2008 ° ° ° ° ...

Page 16

ICS85102I LOW SKEW, 1-TO-2, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT © 2008 Integrated Device Technology, Inc. All rights reserved. Product specifications ...

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