83940DYI-01LF IDT, Integrated Device Technology Inc, 83940DYI-01LF Datasheet - Page 14

• Manufacturer Part Number: 83940DYI-01LF
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of 83940DYI-01LF

• Number Of Clock Inputs: 2
• Output Frequency: 175MHz
• Output Logic Level: LVCMOS/LVTTL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: LQFP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Compliant

ICS83940I-01 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS83940DI-01.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS83940DI-01 is the sum of the core power plus the power dissipated in the load(s). The following is the
power dissipation for V
Dynamic Power Dissipation at 175MHz
Total Power Dissipation
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
a multi-layer board, the appropriate value is 53.5°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will vary depending on the number of loaded outputs, supply voltage, air flow and the type of board
(multi-layer).
Table 6. Thermal Resistance
ICS83940DYI-01 REVISION A SEPTEMBER 27, 2010
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
•
•
85°C + 0.528W * 53.5°C/W = 113.2°C. This is well below the limit of 125°C.
Power (core)
Power (175MHz) = C
Total Power
= Power (core)
= 187.15mW + 340.4mW
= 527.5mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
DD
MAX
= 3.3V + 5% = 3.465V, which gives worst case results.
= V
+ Power (175MHz)
DD_MAX
PD
* Frequency * (V
θ
JA
* (I
for 32 Lead LQFP, Forced Convection
DD
+ I
DDO
JA
DD
* Pd_total + T
) = 3.465V *(26mA + 28mA) = 187.11mW
)
2
* number of outputs = 9pF * 175MHz * (3.465V)
θ
JA
A
53.5°C/W
by Velocity
0
14
LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
48.0°C/W
JA
1
must be used. Assuming no air flow and
2
* 18 = 340.4mW
©2010 Integrated Device Technology, Inc.
44.0°C/W
2.5