IDT77V106L25TFI8 IDT, Integrated Device Technology Inc, IDT77V106L25TFI8 Datasheet - Page 4
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IDT77V106L25TFI8
Manufacturer Part Number
IDT77V106L25TFI8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT77V106L25TFI8.pdf
(27 pages)
Specifications of IDT77V106L25TFI8
Data Rate
25.6/51.2Mbps
Number Of Channels
1
Type Of Atm Phy Interface
UTOPIA
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Pin Count
64
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
TABLE 1 — SIGNAL DESCRIPTION (PART 2 OF 2)
Signal Name
Signal Name
IDT77V106L25
RXLED
RXREF
TXREF
TXLED
AGND
AVDD
OSC
GND
VDD
RST
INT
SM
SE
Pin Number
Pin Number
50, 53, 55
51, 54, 56
22, 44, 60
15, 28,63
34
52
35
33
49
64
59
1
3
2
I/O
I/O
Out
Out
Out
Out
—
—
—
—
In
In
In
In
In
Signal Description
Signal Description
Interrupt INT is an open-drain output, driven low to indicate an interrupt. Once low, INT remains low until
the interrupt status in the appropriate interrupt Status Register is read. Interrupt sources are programmable
via the interrupt Mast Registers.
TTL line rate clock source, driven by a 100 ppm oscillator. 32MHz for 25.63 Mbps; 65 MHz for 51.2 Mbps.
Reset. Active low asynchronous input resets all control logic, counters and FIFOs. A reset must be performed
after power up prior to normal operation of the part.
Receive LED driver. Driven low for 223 cycles of OSC, beginning with RXSOC when a good (non-null
and non-errored) cell is received. Drives 8 mA both high and low.
Receive Reference. Active low. RXREF pulses low for a programmable number of clock cycles when an
X_8 command byte is received.
Reserved signal. This input must be connected to logic low.
Reserved signal. This input must be connected to logic low.
Transmit LED driver. Goes low for 223 cycles of OSC, beginning with TXSOC when a cell is received for
transmission. 8 mA drive current both high and low.
Transmit Reference. At the falling edge of TXREF, an X_8 command byte is inserted into the transmit data
stream. Typical application is WAN timing.
Analog ground. AGND is ground the analog portion of the ship, which sources a more constant current
than the digital portion.
Analog power supply. AVDD supplies power to the analog portion of the chip, which draws a more constant
current than the digital portion. 3.3 ± 0.34V
Digital Ground.
Digital power supply. 3.3 ± 0.3V
Miscellaneous Signals
Power Supply Signals
4