PXB4221EV34NP Infineon Technologies, PXB4221EV34NP Datasheet - Page 83
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PXB4221EV34NP
Manufacturer Part Number
PXB4221EV34NP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PXB4221EV34NP.pdf
(290 pages)
Specifications of PXB4221EV34NP
Data Rate
2.048Mbps
Number Of Channels
1
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Not Compliant
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IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Operational Description
4.9
Cell Insertion
This block allows the insertion of predefined cells stored in the Cell Insertion Buffer into
the UTOPIA receive cell stream.
The Cell Insertion Buffer, located in external RAM, offers space for one ATM cell. The
ATM cell except of the UDF octet needs to be written to the Cell Insertion Buffer via the
Microprocessor interface. When transferring the cell to the UTOPIA receive interface an
UDF of 00
will be inserted.
H
Cell insertion is activated by setting the bit “insert_cell” in the Command Register (“cmd”,
see
Chapter
7.31) the cell is then read from the Cell Insertion Buffer and forwarded to
the UTOPIA Receive Interface.
The port number is generated randomly. Depending on the UTOPIA mode selection, it
will be mapped either on the UTOPIA address bus or in the ATM header
(“mapping_mode” = 2, 3, 4 or 5 in register “utconf”) overwriting the predefined values.
Data Sheet
83
2003-01-20
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