MC33742DW Freescale, MC33742DW Datasheet - Page 42

• Manufacturer Part Number: MC33742DW
• Manufacturer: Freescale

Specifications of MC33742DW

• Data Rate: 1000Kbps
• Number Of Transceivers: 1
• Standard Supported: CAN 2.0
• Operating Supply Voltage (max): 27V
• Operating Supply Voltage (typ): 5/9/12/15/18/24V
• Operating Supply Voltage (min): 4.5V
• Package Type: SOIC W
• Supply Current: 45mA
• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Not Compliant

First the CAN signal is detected by a low consumption
receiver (WU receiver). Then the signal passes through a
pulse width filter, which discards the undesired pulses. The
pulse must have a width bigger than 0.5μs and smaller than
500μs to be accepted. When a pulse is discarded, the pulse
counter is reset and no wake-up signal is generated. When a
CAN WAKE-UP REPORT
mode the SBC is in.
CAN wake-up or any wake-up results in the VDD regulator
turning on, leading to turning on the MCU supply and
releasing reset. If the 33742 is in Stop mode (V2 off and VDD
active), the CAN wake-up or any wake-up is signalled by a
pulse on the INT output. In addition the CANWU bit is set in
the CAN register.
interface is in Sleep mode with wake-up enabled, the CAN
wake-up is reported by the CANWU bit in the CAN register.
mode with wake-up enabled, it is recommended that the user
check for the CANWU bit prior to placing the 33742 in Sleep
or Stop mode in case bus traffic has occurred while the CAN
interface was in Sleep mode.
42
33742
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Figure 23
The CAN wake-up reporting depend upon the low power
If the SBC is placed into Sleep mode (VDD and V2 off), the
If the SBC is in Normal or Standby mode and the CAN
In the event the SBC is in Normal mode and CAN Sleep
CANL
CANH
illustrates how the wake-up signal is generated.
WU Receiver
Pulse Width
Filter
Figure 23. Wake-Up Functional Block Diagram
Pulse OK
Narrow
Pulse
Generator
pulse is accepted, the pulse counter is incremented and, after
three pulses, the internal wake-up signal is asserted.
500μs. If not, the counter will be reset and no wake-up signal
will be generated. This is accomplished by the wake-up
timeout generator. The wake-up cycle is completed (and the
wake-up flag reset) when the CAN interface is brought to
CAN Normal mode.
CANWU reports the CAN wake-up event while the 33742
was in Sleep or Stop mode. This bit is set until the CAN is in
placed by SPI command into TXRX mode and the CAN
register can be read.
CAN BUS DIAGNOSTIC
GND, shorts to VSUP or VDD.
comparators are implemented on the CANH and CANL bus
lines. These comparators monitor the bus voltage level in the
recessive and dominant states. This information is then
managed by a logic circuit to determine if a failure has
occurred and to report it.
comparators in the event of bus failure and the state of the
drivers; that is, whether they are recessive or dominant.
Time-out
Counter
Each one of the pulses must be spaced by no more than
After a CAN wake-up, a flag is set in the CAN register. Bit
The SBC can diagnose CANH or CANL lines short to
As illustrated in
RST
+
Time-out
Figure
Latch
RST
Analog Integrated Circuit Device Data
Table 11
24, several single-ended
indicates the state of the
Freescale Semiconductor
Standby
Internal Wake-up
Signal