KS8993M A5 Micrel Inc, KS8993M A5 Datasheet - Page 44

• Manufacturer Part Number: KS8993M A5
• Manufacturer: Micrel Inc

Specifications of KS8993M A5

• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Power Dissipation: 800mW
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Not Compliant

Loopback Support
The KSZ8993M provides loopback support for remote diagnostic of failure. In loopback mode, the speed at both
PHY ports needs to be set to 100BASE-TX, and the “Priority Buffer reserve” bit needs to be set to 48 pre-
allocated buffers per output queue. The latter is required to prevent loopback packet drops and is achieved by
setting register 4 bit 0 to ‘1’.
Bit 0 of registers 29 and 45 is used to enable loopback for ports 1 and 2, respectively.
Alternatively, the MII Management register 0, bit 14 can be used to enable loopback.
Loopback is conducted between the KSZ8993M’s two PHY ports. The loopback path starts at the “Originating.”
PHY ports receive inputs (RXP/RXM), wraps around at the “loopback” PHY port’s PMD/PMA, and ends at the
“Originating” PHY port’s transmit outputs (TXP/TXM). The KSZ8993M loopback path is illustrated in the following
figure.
Micrel, Inc.
October 2008
Figure 12. Loopback Path
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M9999-020606
KSZ8993M/ML