KS8993M A5 Micrel Inc, KS8993M A5 Datasheet - Page 49

• Manufacturer Part Number: KS8993M A5
• Manufacturer: Micrel Inc

Specifications of KS8993M A5

• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Power Dissipation: 800mW
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Not Compliant

Register 1 (0x01): Chip ID1 / Start Switch
Bit
7-4
3-1
0
Register 2 (0x02): Global Control 0
Bit
7
6-4
3
2
1
0
Micrel, Inc.
October 2008
Enable
802.1p base
priority
Pass flow
control packet
Buffer share
mode
Link change
age
Name
Chip ID
Revision ID
Start switch
Name
New back-off
Reserved
R/W
RO
RO
RW
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
0x0 is assigned to M series. (93M)
Revision ID
= 1, start the chip when external pins
Note: In (PS1, PS0) = (0, 0) mode, the chip will start
automatically after trying to read the external
EEPROM. If EEPROM does not exist, the chip will
use pin strapping and default values for all internal
registers. If EEPROM is present, the contents in the
EEPROM will be checked. The switch will check: (1)
Register 0 = 0x93, (2) Register 1 bits [7:4] = 0x0. If
this check is OK, the contents in the EEPROM will
override chip registers’ default values.
= 0, chip will not start when external pins
Description
New back-off algorithm designed for UNH
Used to classify priority for incoming 802.1Q packets.
“user priority” is compared against this value.
>= : classified as high priority
<
= 1, switch will not filter 802.1x “flow control” packets
= 1, buffer pool is shared by all ports. A port can use
more buffers when other ports are not busy.
= 0, a port is only allowed to use 1/3 of the buffer
pool.
Reserved
= 1, link change from “link” to “no link” will cause fast
aging (<800us) to age
an age cycle is complete, the age logic will return to
normal aging (about 200 sec).
Note: If any port is unplugged, all addresses will be
automatically aged out.
: classified as low priority
(PS1, PS0) = (0,1) or (1,0) or (1,1).
1 = Enable
0 = Disable
(PS1, PS0) = (0,1) or (1,0) or (1,1).
49
address table faster. After
Default
0x0
-
-
Default
0x0
0x4
0x0
0x1
0
0
M9999-020606
KSZ8993M/ML