KSZ8993M A5 Micrel Inc, KSZ8993M A5 Datasheet - Page 38
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KSZ8993M A5
Manufacturer Part Number
KSZ8993M A5
Description
Manufacturer
Micrel Inc
Datasheet
1.KSZ8993M_A5.pdf
(86 pages)
Specifications of KSZ8993M A5
Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Supply Voltage (min)
1.71/3.135V
Power Dissipation
800mW
Supply Current
0.1/0.19A
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant
Port-Based Priority
With port based priority, each ingress port can be individually classified as a high priority receiving port. All
packets received at the high priority receiving port are marked as high priority, and will be sent to the high priority
transmit queue if the corresponding transmit queue is split. Bit 4 of registers 16, 32 and 48 is used to enable port
based priority for ports 1, 2 and 3, respectively. Optionally, the Px_PP strap-in pins can be used to enable this
feature.
802.1p-Based Priority
For 802.1p based priority, the KSZ8993M will examine the ingress (incoming) packets to determine whether they
are tagged. If tagged, the 3-bits priority field in the VLAN tag is retrieved and compared against the “priority base”
value, specified by register 2 bits [6:4]. The “priority base” value is programmable; its default value is 0x4.
The following figure illustrates how the 802.1p priority field is embedded in the 802.1Q VLAN tag.
If an ingress packet has an equal or higher priority value than the "priority base" value, the packet will be placed in
the high priority transmit queue if the corresponding transmit queue is split. 802.1p based priority is enabled by bit
5 of registers 16, 32 and 48 for ports 1, 2 and 3, respectively. Optionally, the Px_1PEN strap-in pins can be used
to enable this feature.
The KSZ8993M provides the option to insert or remove the priority tagged frame's header at each individual
egress port. This header, consisting of the 2 bytes VLAN Protocol ID (VPID) and the 2 bytes Tag Control
Information field (TCI), is also refer to as the 802.1Q VLAN Tag.
Tag Insertion is enabled by bit 2 of registers 16, 32 and 48 for ports 1, 2 and 3, respectively. Optionally, the
Px_TAGINS strap-in pins can be used to enable this feature. At the egress port, untagged packets are tagged
with the ingress port’s default tag. The default tags are programmed in register sets {19,20}, {35,36} and {51,52}
for ports 1, 2 and 3, respectively. The KSZ8993M will not add tags to already tagged packets.
Tag Removal is enabled by bit 1 of registers 16, 32 and 48 for ports 1, 2 and 3, respectively. Optionally, the
Px_TAGRM strap-in pins can be used to enable this feature. At the egress port, tagged packets will have their
802.1Q VLAN Tags removed. The KSZ8993M will not modify untagged packets.
The CRC is recalculated for both tag insertion and tag removal.
802.1p Priority Field Re-mapping is a QoS feature that allows the KSZ8993M to set the “User Priority Ceiling” at
any ingress port. If the ingress packet’s priority field has a higher priority value than the default tag’s priority field
of the ingress port, the packet’s priority field is replaced with the default tag’s priority field. The “User Priority
Ceiling” is enabled by bit 3 of registers 16, 32 and 48 for ports 1, 2 and 3, respectively.
DiffServ-Based Priority
DiffServ-based priority uses registers 96 to 103. More details are provided at the beginning of the Advanced
Control Registers section.
Micrel, Inc.
October 2008
Bytes
802.1q VLAN Tag
Preamble
8
Bits
DA
6
Tagged Packet Type
(8100 for Ethernet)
16
Figure 6. 802.1p Priority Field Format
SA
6
VPID
2
802.1p
TCI
2
3
38
1
length
2
VLAN ID
12
LLC
46-1500
Data
M9999-020606
KSZ8993M/ML
FCS
4