NLXT300ZPE.F4 Intel, NLXT300ZPE.F4 Datasheet - Page 10

• Manufacturer Part Number: NLXT300ZPE.F4
• Manufacturer: Intel

Specifications of NLXT300ZPE.F4

• Number Of Transceivers: 1
• Operating Supply Voltage (typ): 5V
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

LXT300Z/LXT301Z — Advanced T1/E1 Short-Haul Transceivers
2.2
10
Figure 3. LXT301Z Block Diagram
EC1, EC2, EC3
RNEG
RPOS
RCLK
Receiver
The LXT300Z and LXT301Z receivers are identical except for the Jitter Attenuator and Elastic
Store. The following discussion applies to both transceivers except where noted.
The signal is received from one twisted-pair line on each side of a center-grounded transformer.
Positive pulses are received at RTIP and negative pulses are received at RRING. Recovered data is
output at RPOS and RNEG, and the recovered clock is output at RCLK. Refer to the “Test
Specifications” section of this data sheet for receiver timing.
The signal received at RPOS and RNEG is processed through the peak detector and data slicers.
The peak detector samples the inputs and determines the maximum value of the received signal. A
percentage of the peak value is provided to the data slicers as a threshold level to ensure optimum
signal-to-noise ratio. For DSX-1 applications (determined by Equalizer Control inputs EC1~EC3
000) the threshold is set to 70% of the peak value. This threshold is maintained above 65% for up
to 15 successive zeros over the range of specified operating conditions. For E1 applications (EC
inputs = 000) the threshold is set to 50%.
The receiver is capable of accurately recovering signals with up to -13.6 dB of attenuation (from
2.4 V), corresponding to a received signal level of approximately 500 mV. Maximum line length is
1500 feet of ABAM cable (approximately 6 dB). Regardless of received signal level, the peak
detectors are held above a minimum level of 300 mV to provide immunity from impulsive noise.
Note that during a Loss of Signal (LOS) condition, RPOS and RNEG are squelched if the received
input signal drops below 300 mV.
After processing through the data slicers, the received signal is routed to the data and clock
recovery sections, and to the receive monitor. In the LXT300Z only, recovered clock signals are
supplied to the jitter attenuator and the data latch. The recovered data is passed to the elastic store
where it is buffered and synchronized with the dejittered recovered clock (RCLK). The data and
clock recovery circuits have an input jitter tolerance significantly better than required by Pub
62411.
TNEG
MCLK
TPOS
TCLK
DPM
LOS
Internal Clock
Synchronizer
Generator
Equalizer
Control
Recovery
Timing
Latch
Receive
Monitor
Data
Data Slicers
Constant Impedance
Line Driver
Transmit
Monitor
Detector
Driver
Peak
MTIP
MRING
TTIP
TRING
RTIP
RRING
Datasheet