TXC-03303-ARPQ Transwitch Corporation, TXC-03303-ARPQ Datasheet - Page 7

• Manufacturer Part Number: TXC-03303-ARPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03303-ARPQ

• Lead Free Status / RoHS Status: Compliant

Of the eight remaining C-bits, C1 is used as an identification channel; C3 is defined as a Far End Alarm and
Control (FEAC) bit and is controlled via the memory map; C7, C8, and C9 are used for C-bit parity; and the
remaining three bits, C10, C11, and C12, are used to transmit a FEBE indication. A FEBE is automatically
transmitted if a C-bit parity error or framing error is received.
Fixed DS2 to DS3 stuffing is used for M23 multiplexing at a rate of seven stuffs for every 18 DS3 stuff opportu-
nities. This yields a DS2 frequency of +2.6 ppm above the desired frequency of 6.312 Mbit/s. After adding this
to the tolerance of the DS3 clock signal, 20 ppm, the frequency is still within the 32 ppm allowed for a DS2
signal.
Under software control, the M13E can generate DS3 idle and AIS signals, and loop back the transmitted DS3
signal to the receiver for test purposes. Other functions provided by the M13E include: DS1 loopback capabil-
ity, and transmit clock failure protection. The microprocessor interface is selectable via two external hardware
straps. Interface options are: Multiplexed, Intel compatible, or Motorola compatible.
C1
C4*
C7
C10
C13*
C16*
C19*
*These bits are provided at the C-bit interface in the C-bit mode
** Always provided at the receive C-bit interface in the C-bit mode
C2*
C5*
C8
C11
C14*
C17*
C20*
C3**
C6*
C9
C12
C15*
C18*
C21*
Figure 2. C-Bit Assignments
C1 = C-bit parity mode
C2 = Reserved
C3 = Far End Alarm & Control (FEAC)
Not defined, set to one
C-Parity bits
Far End Block Error (FEBE)
Maintenance data link (28 kbit/s)
Not defined, set to one
Not defined, set to one
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Ed. 4, August 1998
TXC-03303
TXC-03303-MB
M13E