LU82541PI Intel, LU82541PI Datasheet - Page 11

• Manufacturer Part Number: LU82541PI
• Manufacturer: Intel

Specifications of LU82541PI

• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Lead Free Status / RoHS Status: Compliant

3.0
3.1
3.2
Signal Type Definitions
PCI Bus Interface Signals (56)
Signal Descriptions
The signals of the 82541(PI/GI/EI) controller are electrically defined as follows:
When the Reset signal (RST#) is asserted, the 82541(PI/GI/EI) will not drive any PCI output or bi-
directional pins. The Power Management Event signal (PME#) can be active by configuring
manageability functions.
I
O
TS
STS
OD
A
P
Name
Input. Standard input only digital signal.
Output. Standard output only digital signal.
Tri-state. Bi-directional tri-state digital input/output signal.
Sustained Tri-state. An active low tri-state signal owned and driven by only one agent at a
time. The agent that drives an STS pin low must drive it high for at least one clock before letting
it float. A new agent cannot start driving an STS signal any sooner than one clock after the
previous owner tri-states it. A pull-up resistor is required to sustain the inactive state until
another agent drives it, and must be provided by the central resource.
Open Drain. Wired-OR with other agents.
The signaling agent asserts the OD signal, but the signal is returned to the inactive state by a
weak pull-up resistor. The pull-up resistor may require two or three clock periods to fully restore
the signal to the de-asserted state.
Analog. PHY analog data signal.
Power. Power connection, voltage reference, or other reference connection.
Definition
Networking Silicon — 82541(PI/GI/EI)
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