DJLXT905LC.C2 831645 Intel, DJLXT905LC.C2 831645 Datasheet - Page 25

• Manufacturer Part Number: DJLXT905LC.C2 831645
• Manufacturer: Intel

Specifications of DJLXT905LC.C2 831645

• Lead Free Status / RoHS Status: Not Compliant

Datasheet
Document Number: 249271
Revision Number: 004
Revision Date: 19-Oct-2005
Table 10. RCLK/Start-of-Frame Timing
Table 11. RCLK/End-of-Frame Timing
Table 12. Transmit Timing
Decoder acquisition time
CD turn-on delay
Receive data setup from
RCLK
Receive data hold from RCLK
RCLK shut off delay from CD assert (Mode 3)
RCLK after CD off
Rcv data through-put delay
CD turn-off delay
Receive block out after TEN off
RCLK switching delay after CD
off
TEN setup from TCLK
TXD setup from TCLK
TEN hold after TCLK
TXD hold after TCLK
Transmit start-up delay
Transmit through-put delay
1. Typical values are at 25 °C, are for design aid only, are not guaranteed, and are not subject to production
1. Typical figures are at 25 °C, are for design aid only are not guaranteed, and are not subject to production
2. CD Turnoff delay, measured from the middle of the last bit: timing specification. The value of the last bit
3. Disables blocking of Carrier Detect during full-duplex operation.
1. Typical values are at 25 °C, are for design aid only, are not guaranteed, and are not subject to production
testing.
testing.
does not affect this value.
testing.
Parameter
Parameter
2
Parameter
LXT905 Universal 10BASE-T Transceiver with 3.3V Support
3
Mode 1
Modes 2, 3, and 4
Mode 1
Modes 2, 3, and 4
Typical
Typical
Symbol
Type
t
t
t
t
t
Max
Max
Min
EHCH
DSCH
CHDU
STUD
t
CHEL
TPD
1
1
t
CDOFF
Sym
tswe
t
t
t
IFG
RC
RD
Minimum
22
22
5
5
–
–
Symbol
Mode 1
t
t
t
DATA
t
t
tsws
t
RDS
RDS
RDH
RDH
CD
400
500
5
5
–
Typical
Mode 2
350
338
Min
375
475
60
30
10
30
50
–
–
–
–
1
–
–
–
–
1
120 (±80)
Mode 3
1300
±100
Typ
400
375
475
70
45
20
45
–
–
Maximum
1
450
350
–
–
–
–
Mode 4
1500
Max
550
375
475
–
–
–
–
–
5
–
–
Units
Units
Units
ns
ns
ns
ns
ns
ns
BT
BT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25