DJLXT905LC.C2 831645 Intel, DJLXT905LC.C2 831645 Datasheet - Page 9

• Manufacturer Part Number: DJLXT905LC.C2 831645
• Manufacturer: Intel

Specifications of DJLXT905LC.C2 831645

• Lead Free Status / RoHS Status: Not Compliant

Datasheet
Document Number: 249271
Revision Number: 004
Revision Date: 19-Oct-2005
Table 1.
Signal Descriptions (Sheet 2 of 2)
1. Externally pull-up or pull-down each pin separately using a 10 k Ω, 1% termination resistor, or tie directly to
2. Do not allow this pin to float. If unused, tie High.
LQFP
Pin #
10
14
15
16
17
18
19
22
23
24
25
26
V
CC
or ground.
PLCC
Pin #
14
16
17
18
19
20
21
24
25
26
27
28
Symbol
RBIAS
DSQE
TPON
RCLK
TPOP
MDO
TPIP
TPIN
RXD
MDI
CD
LI
LXT905 Universal 10BASE-T Transceiver with 3.3V Support
I/O
O
O
O
O
O
I
I
I
I
I
I
I
Carrier Detect. An output for notifying the controller that
activity exists on the network.
Receive Clock. A recovered 10 MHz clock that is
synchronous to the received data and connects to the
controller receive clock input.
Receive Data. Output signal connected directly to the
receive data input of the controller.
Link Enable. Controls link integrity test.
Bias Circuitry. A 7.5 kW 1% resistor to ground at this pin
controls operating circuit bias.
SQE Disable.
Disable SQE for normal operation in Hub/Switch/Repeater
applications. Pulled Low internally
Twisted-Pair Outputs. Differential outputs to the twisted-
pair cable. The outputs are pre-equalized.
Mode Select 0 and 1. Mode select pins determine controller
compatibility mode in accordance with
internally
Twisted-Pair Inputs. A differential input pair from the twisted-
pair cable. Receive filter is integrated on-chip. Does not
require external filters.
•
•
•
•
Enabled when LI is High.
Disabled when LI is Low.
When DSQE is High, the SQE function is disabled.
When DSQE is Low, the SQE function is enabled.
1
.
Description
1
.
Table
2. Pulled Low
9