FWLXT9785EBC.D0 Cortina Systems Inc, FWLXT9785EBC.D0 Datasheet - Page 14
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FWLXT9785EBC.D0
Manufacturer Part Number
FWLXT9785EBC.D0
Description
Manufacturer
Cortina Systems Inc
Datasheet
1.FWLXT9785EBC.D0.pdf
(221 pages)
Specifications of FWLXT9785EBC.D0
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LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Cortina Systems
178-195
Page
178
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227
Description
Added note to Table 60 “Cortina Systems
Parameters” through Table 77 “Cortina Systems
Parameters”.
Added table note to Table 60 “Cortina Systems
Parameters”.
Added table note to Table 66 “Cortina Systems
Parameters”.
Added table note to Table 72 “Cortina Systems
Parameters”
Added software power-down and note to Table 80 “Cortina Systems
Parameters”.
Modified paragraphs and added last paragraph under Section 7.0, “Register Definitions”.
Modified Table 82 “Cortina Systems
Modified Table 83 “Control Register (Address 0)”.
Modified Table 84 “Status Register (Address 1)”.
Modified Table 85 “PHY Identification Register 1 (Address 2)”.
Modified Table 86 “PHY Identification Register 2 (Address 3)”
Modified Table 87 “Auto-Negotiation Advertisement Register (Address 4)”
Modified Table 88 “Auto-Negotiation Link Partner Base Page Ability Register (Address 5)”.
Modified Table 89 “Auto-Negotiation Expansion Register (Address 6)”.
Modified Table 90 “Auto-Negotiation Next Page Transmit Register (Address 7)”.
Modified Table 91 “Auto-Negotiation Link Partner Next Page Receive Register (Address 8)”.
Modified Table 92 “Port Configuration Register (Address 16, Hex 10)”. (Register bits 16.6, 16.4:3)
Modified Table 93 “Quick Status Register (Address 17, Hex 11)”. (Register bit 17.8)
Modified Table 94 “Interrupt Enable Register (Address 18, Hex 12)”
Modified Table 95 “Interrupt Status Register (Address 19, Hex 13)”
Modified Table 96 “LED Configuration Register (Address 20, Hex 14)”
Modified Table 97 “Receive Error Count Register (Address 21, Hex 15)”.
Modified Table 98 “RMII Out-of-Band Signaling Register (Address 25, Hex 19)”.
Modified Table 99 “Trim Enable Register (Address 27, Hex 1B)”. (Register bit 27.6)
Added Table 100 “Cable Diagnostics Register (Address 29, Hex 1D)”.
Modified Table 101 “Cortina Systems
Added Figure 102 “Cortina Systems
Modified table and figure under Section 9.0, “Ordering Information”.
®
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Revision Date: August 28, 2003
®
®
Revision Number: 007
®
LXT9785/LXT9785E Register Set”.
LXT9785MBC 196-Ball BGA15 Package Dimensions”
LXT9785/LXT9785E Register Bit Map”.
®
LXT9785/LXT9785E SMII - 100BASE-TX Receive Timing
®
®
®
®
LXT9785/LXT9785E SMII - 100BASE-TX Receive Timing
LXT9785/LXT9785E SS-SMII - 100BASE-TX Receive Timing
LXT9785/LXT9785E RMII - 100BASE-TX Receive Timing
LXT9785/LXT9785E RMII - 10BASE-T Transmit Timing
®
LXT9785/LXT9785E Power-Up Timing
Revision History
Page 14
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