SLXT973QCA3V 856775 Intel, SLXT973QCA3V 856775 Datasheet - Page 74
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SLXT973QCA3V 856775
Manufacturer Part Number
SLXT973QCA3V 856775
Description
Manufacturer
Intel
Datasheet
1.SLXT973QCA3V_856775.pdf
(88 pages)
Specifications of SLXT973QCA3V 856775
Lead Free Status / RoHS Status
Not Compliant
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LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
74
Table 33. REFCLK Characteristics
Table 34. LED Pin Characteristics
Table 35. 100BASE-TX Transceiver Characteristics
Input Low voltage
Input High voltage
Input Clock Frequency Tolerance
Input Clock Duty Cycle
Input Capacitance
Output Low Voltage
Output High Current
Input Leakage Current
Peak differential output voltage
Signal amplitude symmetry
Signal rise/fall time
Rise/fall time symmetry
Duty cycle distortion
Overshoot/Undershoot
Jitter (measured differentially)
1. Typical values are at 25°C, and are for design aid only, are not guaranteed, and are not subject to
2. Parameter is guaranteed by design: not subject to production testing.
1. Typical values are at 25°C, and are for design aid only, are not guaranteed, and are not subject to
1. Typical values are at 25°C, and are for design aid only, are not guaranteed, and are not subject to
2. Measured at the line side of the transformer, line replaced by 100 (+/-1%) resistor.
production testing.
production testing.
production testing.
Parameter
Parameter
Parameter
2
2
2
Symbol
Symbol
Sym
T
D
V
Vss
T
V
Tdc
V
RFS
V
C
I
V
OS
–
RF
CD
OH
OL
I
P
IH
IN
IL
I
f
0.95
Min
3.0
Min
Min
98
35
2.0
-10
40
–
–
–
–
–
–
–
–
Typ
0.75
Typ
100
Typ
1.0
3.5
.25
50
3.0
–
–
–
–
–
–
–
–
1
1
1
Max
1.05
102
Max
Max
5.0
0.5
1.4
+50
65
0.8
0.4
60
10
10
5
–
–
Units
Units
Units
ppm
ns
ns
ns
%
%
%
pF
V
%
V
V
V
A
A
Rev. Date: March 1, 2002
Document #: 249426
Offset from 16 ns
Test Conditions
Test Conditions
Test Conditions
V
0 < V
pulse width at
50% of pulse
OH
I
OL
Revision #: 002
Datasheet
Note 2
Note 2
Note 2
Note 2
= VCC max
peak
= 10 mA
I
< VCCIO
–
–
–
–
–
–
–
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