PEF4264TV21XT Lantiq, PEF4264TV21XT Datasheet
PEF4264TV21XT
Specifications of PEF4264TV21XT
Related parts for PEF4264TV21XT
PEF4264TV21XT Summary of contents
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Edition 2006-10-10 Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2006. © All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). ...
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... SLIC-S / TSLIC-S Subscriber Line Interface Circuit Standard Feature Set Revision History: 2006-10-10, Revision 2.0 Previous Version: Revision 1.0 Page Subjects (major changes since last revision) Page 38 “Recommended PCB Foot Print Pattern for PG-DSO-36-15 Package” on Page 38 Trademarks ® ® ® ® ...
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... Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1.6 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.1 Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.2 Current Limitation / Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3 Typical Application Circuit for DuSLIC® and VINETIC® Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.2 Foreign Line Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.3 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.4 Thermal Resistances ...
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... List of Figures Figure 1 Logic Symbol SLIC-S/-S2 (PEF 4264/- Figure 2 Logic Symbol TSLIC-S (PEF 4364 Figure 3 Pin Configuration PG-DSO-20-24 Package (top view Figure 4 Pin Configuration PG-VQFN-48-15 Package (top view Figure 5 Pin Configuration PG-DSO-36-15 Package (dual channel) (top view Figure 6 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 7 Transversal and Longitudinal Line Currents ...
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... Pin Definitions and Functions PG-DSO-20-24 and PG-VQFN-48- Table 2 Pin Definitions and Functions PG-DSO-36- Table 3 SLIC-S Mode Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 4 SLIC-S Modes and Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 5 External Components DuSLIC® / VINETIC® for 2 Channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 6 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 7 Voltage Limits on Output Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 8 Current Limits on Output Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 9 Operating Range ...
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... Infineon Technologies’ high voltage ringing Subscriber Line Interface Circuit SLIC-S (PEF 4264) Version 2.1 (V2.1) is the latest out of the well-known and broadly used SLIC-S family. It has been designed not only to cover all previous SLIC-S applications, but also to extend the supply voltage range to 120 V to enable balanced sinusoidal ring signals SLIC-S V2 ...
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... Positive ring supply voltage up to +70 V • Total supply voltage up to 120 V • Integrated balanced ringing • High longitudinal balance performance with SLIC-S2 (PEF 4264-2) • Power-saving active mode (ACTL) with reduced battery voltage • Power Down mode with negligible power consumption • ...
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... Logic Symbol Tip/Ring interface Power supply Figure 1 Logic Symbol SLIC-S/-S2 (PEF 4264/-2) Tip/Ring interface channel A channel A Power supply channel A Tip/Ring interface channel B channel B Power supply channel B Figure 2 Logic Symbol TSLIC-S (PEF 4364) Preliminary Data Sheet TIP CEXT RING IT IL SLIC-S/-S2 ...
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... Pin Configuration PG-VQFN-48-15 Package (top view) Preliminary Data Sheet SLIC-S/- PEF 4264/-2 N.C. 16 DCP 15 PG-DSO-20-24 DCN 14 ACP 13 ACN 12 N. SLIC-S/-S2 41 PEF 4264/- PG-VQFN-48- SLIC-S / TSLIC-S PEF 4264 / PEF 4364 General Description RING 1 TIP VHR 4 VDD 5 VBATL 6 VBATH 7 N. CEXT N. N.C. 19 DCP 18 DCN 17 ACP 16 ACN ...
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... VBATH 7 AG NDA 8 TSLIC-S PEF 4364 9 CEXTA 10 RINGB PG-DSO-36-15 11 TIPB 12 BG NDB VHRB 13 14 VDDB VBATLB 15 VBATH 16 AG NDB 17 CEXTB 18 11 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 General Description 36 ITA 35 ILA 34 C1A 33 C2A 32 DCPA 31 DCNA 30 ACPA 29 ACNA 28 N.C. 27 ITB 26 ILB 25 C1B 24 ...
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... A. O Current output: longitudinal line current scaled down by a factor of 100 O Current output: transversal line current scaled down by a factor of 50 Not connected 12 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 General Description BATL BATH ...
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... A. Current output: longitudinal line current scaled down by a factor of 100 Current output: transversal line current scaled down by a factor of 50 Not connected 13 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 General Description ...
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... Preliminary Data Sheet SLIC-S V2 Off-hook ( Current ( Sensor T R VHI + - I T VBI + - VHI - + VBAT VBI Switch 14 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 General Description VHI )/10 switch R0 )/100 R )/200 R R/6 *1 (*2) R/ (*2) R/30 R/6 Bias Mode Control Table Revision 2.0, 2006-10-10 BGND VHR IT IL ...
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... Functional Description A functional block diagram is shown in SLIC-S V2.1 supports AC and DC control loops based on feeding a voltage I transversal line current and the longitudinal current Trans In receive direction, DC and AC voltages are handled separately with different gains. Both are applied differentially via the codec interface pins DCP / DCN and ACP / ACN, respectively, defining the transversal line voltage V ...
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... Operating Modes SLIC-S V2.1 operates in the following modes controlled by ternary logic signals at C1 and C2: Table 3 SLIC-S Mode Table PDH M ACTL H HIRT 1) No ‘Overtemp’ signaling possible via pin C1 low. Table 4 SLIC-S Modes and Supplies Mode Mode Description PDH Power Down High Impedance ...
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... In any operating mode the total current delivered by the output drivers is limited to typically 85 mA. If, however, the junction temperature exceeds 165 °C, the current limit is further reduced to keep the junction temperature constant. Simultaneously, pin C1 sinks a signalling current Preliminary Data Sheet I . therm 17 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Functional Description Revision 2.0, 2006-10-10 ...
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... Typical Application Circuit for DuSLIC Figure 8 to Figure 9 show one channel of application circuits including SLIC-S / TSLIC-S V2.1 and SLICOFI ® VINETIC codec (please refer to the latest DuSLIC In Table 5 the recommended external components for a dual channel DuSLIC typical values are listed. Table 5 External Components DuSLIC No ...
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... Figure 8 Application Circuit DuSLIC Preliminary Data Sheet Typical Application Circuit for DuSLIC® and VINETIC® ® 19 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Revision 2.0, 2006-10-10 ...
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... Figure 9 Application Circuit VINETIC Preliminary Data Sheet Typical Application Circuit for DuSLIC® and VINETIC® ® 20 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Revision 2.0, 2006-10-10 ...
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... Foreign Line Voltages External voltages applied at the line outputs may cause large currents in the SLIC. The resulting on-chip power dissipation has to be limited to avoid thermal destruction, if the overtemperature protection cannot react sufficiently fast due to high local power density. The safe power dissipation values are strongly dependent on duration. They ...
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... K/W PG-DSO-20-24 with heatsink PG-DSO-36-15, 4-layer JEDEC PCB with vias, die pad soldered to PCB (footprint see 25 – K/W PG-VQFN-48-15, 4-layer JEDEC PCB with vias, die pad soldered to PCB (footprint see 22 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Electrical Characteristics Max. current [A] 0.1 0.5 1.0 1.5 Unit Note / Test Condition – ...
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... SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Electrical Characteristics – +32 V and BATL HR Unit Note / No. Test Conditi on A – – – – – ...
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... Symbol V I current BATL BATL V I current Current depending on supply voltage: 2) Current depending on supply voltage: 3) Current depending on line voltage: 4) Current depending on line voltage: The total power dissipated in the SLIC consists of the quiescent power P output stage power caused by any line current tot ...
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... V – BATH –10 – –10 – –10 – –10 – EXT – 0.1 – 20 – 100 – SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Electrical Characteristics Unit Note / Test Condition No. Max 0 1.5 V DCP DCN Modes: ACTx V V 24.5 V – = 0.8 V DCP DCN ...
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... Min. Typ. 380 400 –420 –400 49.5 50 IT,DC 800 950 – –160 –125 2.7 – 1.2 – –0.3 – 120 150 – 165 26 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Electrical Characteristics Unit Note / Test Condition No. Max 420 –380 – 50.5 – mA ...
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... SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Electrical Characteristics ACTH, ACTL Unit Note / Test Condition V V – = 640 mV ACP ACN rms f = 1015 – = 640 mV ACP ...
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... RNG0 – – 0.02 IT – –110 pVIT – SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Electrical Characteristics Unit Note / Test Condition Max long rms f – dB 300 Hz < < 1 kHz f – 3.4 kHz V V – dB – = 1920 mV ACP ACN f 300 Hz < ...
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... Figure 11 Typical Frequency Dependence of PSRR 0.1 Figure 12 Typical Frequency Dependence of PSRR V Preliminary Data Sheet PSRR BATL 100 Frequency [kHz] /V BATL TR PSRR BATH 100 Frequency [kHz] /V BATH TR 29 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Electrical Characteristics 1000 1000 Revision 2.0, 2006-10-10 ...
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... Figure 13 Typical Frequency Dependence of PSRR 0.1 Figure 14 Typical Frequency Dependence of PSRR V Preliminary Data Sheet PSRR Frequency [kHz PSRR ACTR ACTL, ACTH 1 10 Frequency [kHz SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Electrical Characteristics 100 1000 100 1000 Revision 2.0, 2006-10-10 ...
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... Preliminary Data Sheet TIP PEF 4264 V2.1 RING VBATL VBATH AGND C2 VDD C1 +3.3 V -24 V -48 V TIP PEF 4264 V2.1 RING VBATL AGND C1 VBATH C2 VDD +3.3 V - SLIC-S / TSLIC-S PEF 4264 / PEF 4364 1.6 k ACN ~ ACP CEXT 100 nF DCP = DCN VHR BGND + ...
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... Preliminary Data Sheet TIP PEF 4264 V2.1 RING VBATL AGND C1 VBATH C2 VDD -24 V -48 V +3.3 V TIP PEF 4264 V2.1 RING VBATL VBATH AGND C1 C2 VDD +3.3 V - SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Test Figures 1 ACN = ACP CEXT 100 nF DCP DCN VHR BGND +32 V ...
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... PEF 4264 V2.1 RING VBATL AGND C1 VBATH C2 VDD -24 V -48 V +3.3 V TIP PEF 4264 V2.1 RING VBATL VBATH AGND C1 C2 VDD +3.3 V - SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Test Figures 1.6 k ACN = ACP CEXT 100 nF DCP = DCN 660 / 30 VHR BGND DC ...
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... PEF 4264 V2.1 RING VBATL AGND C1 VBATH C2 VDD -24 V -48 V +3.3 V TIP PEF 4264 V2.1 RING VBATL AGND C1 VBATH C2 VDD -24 V - SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Test Figures 1.6 k ACN ~ ACP rms CEXT 100 nF DCP = DCN 660 / 30 VHR BGND ...
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... V between VHR and VBATH, touching of the heatsink or any attached conducting part can be hazardous. Preliminary Data Sheet 16.1 ±0.1 (Heatslug) 2.8 0.1 0.25 A 20x M Bottom View Heatslug 13.7 -0.2 (Metal) 1) 15.9 ±0.15 A (Mold) 35 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Package Outlines 1) 11 ±0.15 B 6.3 (Mold) 0.95 ±0.15 14.2 ±0.3 0. GPS01033 Revision 2.0, 2006-10-10 ...
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... Recommended PCB Foot Print Pattern for PG-VQFN-48-15 Package For detailed information on PCB related thermal and soldering issues of the PG-VQFN-48-15 package see [4], chapter 3 and 4. Preliminary Data Sheet PEF 4264 / PEF 4364 36 SLIC-S / TSLIC-S Package Outlines Revision 2.0, 2006-10-10 ...
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... V between VHR and VBATH, touching of the heatsink or any attached conducting part can be hazardous. Preliminary Data Sheet 15.74 ±0.1 (Heatslug) 0.1 C 36x 0. 15.9 ±0.1 A (Mold) 37 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Package Outlines ±0. 2.8 6.3 Heatslug (Mold) 0.95 ±0.15 14.2 ±0.3 0.25 Bottom View 19 36 Heatslug ...
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... F lash end ed, free o f solder re sist Figure 26 Footprint for PG-DSO-36-15 Preliminary Data Sheet Figure 25. For improved thermal behaviour the utilization laye r w ith solde r resist coa tin hole 38 SLIC-S / TSLIC-S PEF 4264 / PEF 4364 Package Outlines tslu tlin cka tlin e Revision 2.0, 2006-10-10 ...
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... References [1] SLIC-S/-S2 / TSLIC-S (PEF 4264/-2 / PEF 4364) Application Note “Protection for SLIC-S/-S2 against Overvoltages and Overcurrents according to ITU-T K. 20/K.21/K.45” Rev. 1.0, 2003-07-18 ® [2] VINETIC Version 1.4 Prel. Application Note External Components Rev. 2.0, 2005-09-06 ® [3] VINETIC Version 2.1/2.2 Preliminary Hardware Design Guide Rev. 2.0, 2005-05-19 ...
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